X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=arch%2Farm%2Fcpu%2Farmv7%2Fomap-common%2Fclocks-common.c;fp=arch%2Farm%2Fcpu%2Farmv7%2Fomap-common%2Fclocks-common.c;h=9b975831046ddedf0166ded2599489608c8cc5de;hb=c359ae5e8b461113c51ebbf3e587c4c362bff2e2;hp=7e5e752c3ef381649bb654b12025c40cad80c418;hpb=5328717cde60c81b355c456fa29ab22dad52a5db;p=u-boot

diff --git a/arch/arm/cpu/armv7/omap-common/clocks-common.c b/arch/arm/cpu/armv7/omap-common/clocks-common.c
index 7e5e752c3e..9b97583104 100644
--- a/arch/arm/cpu/armv7/omap-common/clocks-common.c
+++ b/arch/arm/cpu/armv7/omap-common/clocks-common.c
@@ -529,7 +529,6 @@ void __weak recalibrate_iodelay(void)
  */
 void scale_vcores(struct vcores_data const *vcores)
 {
-#if defined(CONFIG_DRA7XX)
 	int i;
 	struct volts *pv = (struct volts *)vcores;
 	struct volts *px;
@@ -589,7 +588,16 @@ void scale_vcores(struct vcores_data const *vcores)
 		  vcores->mpu.abb_tx_done_mask,
 		  OMAP_ABB_FAST_OPP);
 
-	/* The .mm member is not used for the DRA7xx */
+	debug("mm: %d\n", vcores->mm.value);
+	do_scale_vcore(vcores->mm.addr, vcores->mm.value, vcores->mm.pmic);
+	/* Configure MM ABB LDO after scale */
+	abb_setup(vcores->mm.efuse.reg,
+		  (*ctrl)->control_wkup_ldovbb_mm_voltage_ctrl,
+		  (*prcm)->prm_abbldo_mm_setup,
+		  (*prcm)->prm_abbldo_mm_ctrl,
+		  (*prcm)->prm_irqstatus_mpu,
+		  vcores->mm.abb_tx_done_mask,
+		  OMAP_ABB_FAST_OPP);
 
 	debug("gpu: %d\n", vcores->gpu.value);
 	do_scale_vcore(vcores->gpu.addr, vcores->gpu.value, vcores->gpu.pmic);
@@ -621,56 +629,6 @@ void scale_vcores(struct vcores_data const *vcores)
 		  (*prcm)->prm_irqstatus_mpu,
 		  vcores->iva.abb_tx_done_mask,
 		  OMAP_ABB_FAST_OPP);
-	/* Might need udelay(1000) here if debug is enabled to see all prints */
-#else
-	u32 val;
-
-	val = optimize_vcore_voltage(&vcores->core);
-	do_scale_vcore(vcores->core.addr, val, vcores->core.pmic);
-
-	/*
-	 * IO delay recalibration should be done immediately after
-	 * adjusting AVS voltages for VDD_CORE_L.
-	 * Respective boards should call __recalibrate_iodelay()
-	 * with proper mux, virtual and manual mode configurations.
-	 */
-#ifdef CONFIG_IODELAY_RECALIBRATION
-	recalibrate_iodelay();
-#endif
-
-	val = optimize_vcore_voltage(&vcores->mpu);
-	do_scale_vcore(vcores->mpu.addr, val, vcores->mpu.pmic);
-
-	/* Configure MPU ABB LDO after scale */
-	abb_setup(vcores->mpu.efuse.reg,
-		  (*ctrl)->control_wkup_ldovbb_mpu_voltage_ctrl,
-		  (*prcm)->prm_abbldo_mpu_setup,
-		  (*prcm)->prm_abbldo_mpu_ctrl,
-		  (*prcm)->prm_irqstatus_mpu_2,
-		  vcores->mpu.abb_tx_done_mask,
-		  OMAP_ABB_FAST_OPP);
-
-	val = optimize_vcore_voltage(&vcores->mm);
-	do_scale_vcore(vcores->mm.addr, val, vcores->mm.pmic);
-
-	/* Configure MM ABB LDO after scale */
-	abb_setup(vcores->mm.efuse.reg,
-		  (*ctrl)->control_wkup_ldovbb_mm_voltage_ctrl,
-		  (*prcm)->prm_abbldo_mm_setup,
-		  (*prcm)->prm_abbldo_mm_ctrl,
-		  (*prcm)->prm_irqstatus_mpu,
-		  vcores->mm.abb_tx_done_mask,
-		  OMAP_ABB_FAST_OPP);
-
-	val = optimize_vcore_voltage(&vcores->gpu);
-	do_scale_vcore(vcores->gpu.addr, val, vcores->gpu.pmic);
-
-	val = optimize_vcore_voltage(&vcores->eve);
-	do_scale_vcore(vcores->eve.addr, val, vcores->eve.pmic);
-
-	val = optimize_vcore_voltage(&vcores->iva);
-	do_scale_vcore(vcores->iva.addr, val, vcores->iva.pmic);
-#endif
 }
 
 static inline void enable_clock_domain(u32 const clkctrl_reg, u32 enable_mode)