X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=arch%2Farm%2Fcpu%2Farmv7%2Fomap4%2Fhwinit.c;h=7c6638ca80dc30ac72cd743d9d80344c4d561808;hb=272686eb7576c02df4616bcf893fde993e7ba57e;hp=b0598a0774d5a0ce6a085a244e782c16439418d3;hpb=e62d5fb0da76ef168e90cae9bbbda80349aaf137;p=u-boot

diff --git a/arch/arm/cpu/armv7/omap4/hwinit.c b/arch/arm/cpu/armv7/omap4/hwinit.c
index b0598a0774..7c6638ca80 100644
--- a/arch/arm/cpu/armv7/omap4/hwinit.c
+++ b/arch/arm/cpu/armv7/omap4/hwinit.c
@@ -15,7 +15,7 @@
 #include <asm/armv7.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/sys_proto.h>
-#include <asm/sizes.h>
+#include <linux/sizes.h>
 #include <asm/emif.h>
 #include <asm/arch/gpio.h>
 #include <asm/omap_common.h>
@@ -25,12 +25,12 @@ DECLARE_GLOBAL_DATA_PTR;
 u32 *const omap_si_rev = (u32 *)OMAP_SRAM_SCRATCH_OMAP_REV;
 
 static const struct gpio_bank gpio_bank_44xx[6] = {
-	{ (void *)OMAP44XX_GPIO1_BASE, METHOD_GPIO_24XX },
-	{ (void *)OMAP44XX_GPIO2_BASE, METHOD_GPIO_24XX },
-	{ (void *)OMAP44XX_GPIO3_BASE, METHOD_GPIO_24XX },
-	{ (void *)OMAP44XX_GPIO4_BASE, METHOD_GPIO_24XX },
-	{ (void *)OMAP44XX_GPIO5_BASE, METHOD_GPIO_24XX },
-	{ (void *)OMAP44XX_GPIO6_BASE, METHOD_GPIO_24XX },
+	{ (void *)OMAP44XX_GPIO1_BASE },
+	{ (void *)OMAP44XX_GPIO2_BASE },
+	{ (void *)OMAP44XX_GPIO3_BASE },
+	{ (void *)OMAP44XX_GPIO4_BASE },
+	{ (void *)OMAP44XX_GPIO5_BASE },
+	{ (void *)OMAP44XX_GPIO6_BASE },
 };
 
 const struct gpio_bank *const omap_gpio_bank = gpio_bank_44xx;
@@ -156,14 +156,22 @@ void init_omap_revision(void)
 	}
 }
 
+void omap_die_id(unsigned int *die_id)
+{
+	die_id[0] = readl((*ctrl)->control_std_fuse_die_id_0);
+	die_id[1] = readl((*ctrl)->control_std_fuse_die_id_1);
+	die_id[2] = readl((*ctrl)->control_std_fuse_die_id_2);
+	die_id[3] = readl((*ctrl)->control_std_fuse_die_id_3);
+}
+
 #ifndef CONFIG_SYS_L2CACHE_OFF
 void v7_outer_cache_enable(void)
 {
-	set_pl310_ctrl_reg(1);
+	omap_smc1(OMAP4_SERVICE_PL310_CONTROL_REG_SET, 1);
 }
 
 void v7_outer_cache_disable(void)
 {
-	set_pl310_ctrl_reg(0);
+	omap_smc1(OMAP4_SERVICE_PL310_CONTROL_REG_SET, 0);
 }
 #endif /* !CONFIG_SYS_L2CACHE_OFF */