X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=arch%2Farm%2Fcpu%2Farmv8%2Fsec_firmware.c;h=ec9cf40241a14e4c817a2bd6734957291a00f9ee;hb=f1cc97764be4383d2aeb56d5ba5415439a1d5c97;hp=e21e199381dc9faa42207fbaabd5c00256745ede;hpb=c98b171e1098f94b2ff7720c45a25a602882f876;p=u-boot

diff --git a/arch/arm/cpu/armv8/sec_firmware.c b/arch/arm/cpu/armv8/sec_firmware.c
index e21e199381..ec9cf40241 100644
--- a/arch/arm/cpu/armv8/sec_firmware.c
+++ b/arch/arm/cpu/armv8/sec_firmware.c
@@ -19,12 +19,22 @@ extern void c_runtime_cpu_setup(void);
 #define SEC_FIRMWARE_LOADED	0x1
 #define SEC_FIRMWARE_RUNNING	0x2
 #define SEC_FIRMWARE_ADDR_MASK	(~0x3)
-	/*
-	 * Secure firmware load addr
-	 * Flags used: 0x1 secure firmware has been loaded to secure memory
-	 *             0x2 secure firmware is running
-	 */
-	phys_addr_t sec_firmware_addr;
+/*
+ * Secure firmware load addr
+ * Flags used: 0x1 secure firmware has been loaded to secure memory
+ *             0x2 secure firmware is running
+ */
+phys_addr_t sec_firmware_addr;
+
+#ifndef SEC_FIRMWARE_FIT_IMAGE
+#define SEC_FIRMWARE_FIT_IMAGE		"firmware"
+#endif
+#ifndef SEC_FIRMEWARE_FIT_CNF_NAME
+#define SEC_FIRMEWARE_FIT_CNF_NAME	"config@1"
+#endif
+#ifndef SEC_FIRMWARE_TARGET_EL
+#define SEC_FIRMWARE_TARGET_EL		2
+#endif
 
 static int sec_firmware_get_data(const void *sec_firmware_img,
 				const void **data, size_t *size)
@@ -199,7 +209,7 @@ __weak bool sec_firmware_is_valid(const void *sec_firmware_img)
 	return true;
 }
 
-#ifdef CONFIG_ARMV8_PSCI
+#ifdef CONFIG_SEC_FIRMWARE_ARMV8_PSCI
 /*
  * The PSCI_VERSION function is added from PSCI v0.2. When the PSCI
  * v0.1 received this function, the NOT_SUPPORTED (0xffff_ffff) error