X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=arch%2Farm%2Fcpu%2Fixp%2Fstart.S;h=b7259645e5c88150cf8a738585829a7ef3675f44;hb=412665b46134f93464c09405e02f08ac9c62526d;hp=f8bfed7cc61074962f53389d2d4b4437e639b44c;hpb=44c6e6591cb451ae606f8bde71dd5fb7b4002544;p=u-boot

diff --git a/arch/arm/cpu/ixp/start.S b/arch/arm/cpu/ixp/start.S
index f8bfed7cc6..b7259645e5 100644
--- a/arch/arm/cpu/ixp/start.S
+++ b/arch/arm/cpu/ixp/start.S
@@ -65,7 +65,8 @@
 	.endm
 
 .globl _start
-_start: b	reset
+_start:
+	ldr	pc, _reset
 	ldr	pc, _undefined_instruction
 	ldr	pc, _software_interrupt
 	ldr	pc, _prefetch_abort
@@ -74,6 +75,7 @@ _start: b	reset
 	ldr	pc, _irq
 	ldr	pc, _fiq
 
+_reset:                 .word reset
 _undefined_instruction: .word undefined_instruction
 _software_interrupt:	.word software_interrupt
 _prefetch_abort:	.word prefetch_abort
@@ -110,7 +112,11 @@ _bss_start_ofs:
 
 .globl _bss_end_ofs
 _bss_end_ofs:
-	.word __bss_end__ - _start
+	.word __bss_end - _start
+
+.globl _end_ofs
+_end_ofs:
+	.word _end - _start
 
 #ifdef CONFIG_USE_IRQ
 /* IRQ stack memory (calculated at run-time) */
@@ -163,12 +169,6 @@ reset:
 	str     r1, [r2]
 
 	/* make sure flash is visible at 0 */
-#if 0
-	ldr	r2, =IXP425_EXP_CFG0
-	ldr     r1, [r2]
-	orr     r1, r1, #0x80000000
-	str     r1, [r2]
-#endif
 	mov	r1, #CONFIG_SYS_SDR_CONFIG
 	ldr     r2, =IXP425_SDR_CONFIG
 	str     r1, [r2]
@@ -212,19 +212,6 @@ reset:
 	str	r1, [r4]
 	DELAY_FOR 0x4000, r0
 
-	/* copy */
-	mov     r0, #0
-	mov     r4, r0
-	add     r2, r0, #CONFIG_SYS_MONITOR_LEN
-	mov     r1, #0x10000000
-	mov     r5, r1
-
-    30:
-	ldr     r3, [r0], #4
-	str     r3, [r1], #4
-	cmp     r0, r2
-	bne     30b
-
 	/* invalidate I & D caches & BTB */
 	mcr	p15, 0, r0, c7, c7, 0
 	CPWAIT	r0
@@ -237,19 +224,12 @@ reset:
 	mcr	p15, 0, r0, c7, c10, 4
 	CPWAIT	r0
 
-	/* move flash to 0x50000000 */
+	/* remove flash mirror at 0x00000000 */
 	ldr	r2, =IXP425_EXP_CFG0
 	ldr     r1, [r2]
 	bic     r1, r1, #0x80000000
 	str     r1, [r2]
 
-	nop
-	nop
-	nop
-	nop
-	nop
-	nop
-
 	/* invalidate I & Data TLB */
 	mcr	p15, 0, r0, c8, c7, 0
 	CPWAIT r0
@@ -265,12 +245,7 @@ reset:
 	orr	r0,r0,#0x13
 	msr	cpsr,r0
 
-/* Set stackpointer in internal RAM to call board_init_f */
-call_board_init_f:
-	ldr	sp, =(CONFIG_SYS_INIT_SP_ADDR)
-	bic	sp, sp, #7 /* 8-byte alignment for ABI compliance */
-	ldr	r0,=0x00000000
-	bl	board_init_f
+	bl	_main
 
 /*------------------------------------------------------------------------------*/
 
@@ -287,13 +262,10 @@ relocate_code:
 	mov	r5, r1	/* save addr of gd */
 	mov	r6, r2	/* save addr of destination */
 
-	/* Set up the stack						    */
-stack_setup:
-	mov	sp, r4
-
 	adr	r0, _start
 	cmp	r0, r6
-	beq	clear_bss		/* skip relocation */
+	moveq	r9, #0		/* no relocation. relocation offset(r9) = 0 */
+	beq	relocate_done		/* skip relocation */
 	mov	r1, r6			/* r1 <- scratch for copy_loop */
 	ldr	r3, _bss_start_ofs
 	add	r2, r0, r3		/* r2 <- source end address	    */
@@ -304,7 +276,7 @@ copy_loop:
 	cmp	r0, r2			/* until source end address [r2]    */
 	blo	copy_loop
 
-#ifndef CONFIG_PRELOADER
+#ifndef CONFIG_SPL_BUILD
 	/*
 	 * fix .rel.dyn relocations
 	 */
@@ -345,40 +317,9 @@ fixnext:
 	blo	fixloop
 #endif
 
-clear_bss:
-#ifndef CONFIG_PRELOADER
-	ldr	r0, _bss_start_ofs
-	ldr	r1, _bss_end_ofs
-	mov	r4, r6			/* reloc addr */
-	add	r0, r0, r4
-	add	r1, r1, r4
-	mov	r2, #0x00000000		/* clear			    */
-
-clbss_l:str	r2, [r0]		/* clear loop...		    */
-	add	r0, r0, #4
-	cmp	r0, r1
-	bne	clbss_l
-
-	bl coloured_LED_init
-	bl red_LED_on
-#endif
+relocate_done:
 
-/*
- * We are done. Do not return, instead branch to second part of board
- * initialization, now running from RAM.
- */
-	ldr	r0, _board_init_r_ofs
-	adr	r1, _start
-	add	lr, r0, r1
-	add	lr, lr, r9
-	/* setup parameters for board_init_r */
-	mov	r0, r5		/* gd_t */
-	mov	r1, r6		/* dest_addr */
-	/* jump to it ... */
-	mov	pc, lr
-
-_board_init_r_ofs:
-	.word board_init_r - _start
+	bx	lr
 
 _rel_dyn_start_ofs:
 	.word __rel_dyn_start - _start
@@ -387,6 +328,11 @@ _rel_dyn_end_ofs:
 _dynsym_start_ofs:
 	.word __dynsym_start - _start
 
+	.globl	c_runtime_cpu_setup
+c_runtime_cpu_setup:
+
+	bx	lr
+
 /****************************************************************************/
 /*									    */
 /* Interrupt handling							    */
@@ -571,33 +517,5 @@ reset_cpu:
 	str     r1, [r2]
 	b	reset_endless
 
-
 reset_endless:
-
 	b	reset_endless
-
-#ifdef CONFIG_USE_IRQ
-
-.LC0:		.word	loops_per_jiffy
-
-/*
- * 0 <= r0 <= 2000
- */
-.globl __udelay
-__udelay:
-	mov	r2,     #0x6800
-	orr	r2, r2, #0x00db
-	mul	r0, r2, r0
-	ldr	r2, .LC0
-	ldr	r2, [r2]		@ max = 0x0fffffff
-	mov	r0, r0, lsr #11		@ max = 0x00003fff
-	mov	r2, r2, lsr #11		@ max = 0x0003ffff
-	mul	r0, r2, r0		@ max = 2^32-1
-	movs	r0, r0, lsr #6
-
-delay_loop:
-	subs	r0, r0, #1
-	bne	delay_loop
-	mov	pc, lr
-
-#endif /* CONFIG_USE_IRQ */