X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=arch%2Farm%2Fcpu%2Fpxa%2Fconfig.mk;h=7fb5316d8f3b14013ecddaa8bf94c8f119c863e9;hb=9cfc05985319c52933d84a7609fc8b143b1ff18a;hp=d8d263d404dbeb1c7b884f8eca22d530722ace09;hpb=5c8d5b6fc15fc2c52d74c266d9fe6eb5f75cbcb4;p=u-boot

diff --git a/arch/arm/cpu/pxa/config.mk b/arch/arm/cpu/pxa/config.mk
index d8d263d404..7fb5316d8f 100644
--- a/arch/arm/cpu/pxa/config.mk
+++ b/arch/arm/cpu/pxa/config.mk
@@ -6,11 +6,15 @@
 # SPDX-License-Identifier:	GPL-2.0+
 #
 
-PLATFORM_CPPFLAGS += -mcpu=xscale
-# =========================================================================
 #
-# Supply options according to compiler version
+# !WARNING!
+# The PXA's OneNAND SPL uses .text.0 and .text.1 segments to allow booting from
+# really small OneNAND memories where the mmap'd window is only 1KiB big. The
+# .text.0 contains only the bare minimum needed to load the real SPL into SRAM.
+# Add .text.0 and .text.1 into OBJFLAGS, so when the SPL is being objcopy'd,
+# they are not discarded.
 #
-# ========================================================================
-PF_RELFLAGS_SLB_AT := $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,))
-PLATFORM_RELFLAGS += $(PF_RELFLAGS_SLB_AT)
+
+#ifdef CONFIG_SPL_BUILD
+OBJCOPYFLAGS += -j .text.0 -j .text.1
+#endif