X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=arch%2Farm%2Fcpu%2Fpxa%2Fpxafb.c;h=1cb78f0178ef35a33f9e5cc81b805351dee1ccad;hb=5ab877b688983f5926de829cda3f1d65feb57331;hp=d56c5f099f09155c7f3d03361b12dffe91428ad5;hpb=84ad688473bec2875e171b71040eb9e033c6c206;p=u-boot

diff --git a/arch/arm/cpu/pxa/pxafb.c b/arch/arm/cpu/pxa/pxafb.c
index d56c5f099f..1cb78f0178 100644
--- a/arch/arm/cpu/pxa/pxafb.c
+++ b/arch/arm/cpu/pxa/pxafb.c
@@ -292,7 +292,9 @@ static int pxafb_init_mem (void *lcdbase, vidinfo_t *vid)
 
 	return 0;
 }
-
+#ifdef	CONFIG_CPU_MONAHANS
+static inline void pxafb_setup_gpio (vidinfo_t *vid) {}
+#else
 static void pxafb_setup_gpio (vidinfo_t *vid)
 {
 	u_long lccr0;
@@ -349,6 +351,7 @@ static void pxafb_setup_gpio (vidinfo_t *vid)
 		printf("pxafb_setup_gpio: unable to determine bits per pixel\n");
 	}
 }
+#endif
 
 static void pxafb_enable_controller (vidinfo_t *vid)
 {
@@ -363,7 +366,11 @@ static void pxafb_enable_controller (vidinfo_t *vid)
 	FDADR1 = vid->pxa.fdadr1;
 	LCCR0 |= LCCR0_ENB;
 
+#ifdef	CONFIG_CPU_MONAHANS
+	CKENA |= CKENA_1_LCD;
+#else
 	CKEN |= CKEN16_LCD;
+#endif
 
 	debug("FDADR0 = 0x%08x\n", (unsigned int)FDADR0);
 	debug("FDADR1 = 0x%08x\n", (unsigned int)FDADR1);