X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=arch%2Farm%2Fcpu%2Fu-boot.lds;h=13aa4fa48814f6da575e9ed53ff94be74d4a833d;hb=312a6c016a2d81aa3fbc605f5c0c315b6a4e3464;hp=d48a905cf3cf1707593308339da041e39eda5c32;hpb=d47cb0b61aa9e268f140455b2bc4421ae9e0b4bc;p=u-boot

diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds
index d48a905cf3..13aa4fa488 100644
--- a/arch/arm/cpu/u-boot.lds
+++ b/arch/arm/cpu/u-boot.lds
@@ -14,23 +14,24 @@ OUTPUT_ARCH(arm)
 ENTRY(_start)
 SECTIONS
 {
+#if defined(CONFIG_ARMV7_SECURE_BASE) && defined(CONFIG_ARMV7_NONSEC)
 	/*
-	 * Discard the relocation entries for secure text.
-	 * The secure code is bundled with u-boot image, so there will
-	 * be relocations entries for the secure code, since we use
-	 * "-mword-relocations" to compile and "-pie" to link into the
-	 * final image. We do not need the relocation entries for secure
-	 * code, because secure code will not be relocated, it only needs
-	 * to be copied from loading address to CONFIG_ARMV7_SECURE_BASE,
-	 * which is the linking and running address for secure code.
-	 * If keep the relocation entries in .rel.dyn section,
-	 * "relocation offset + linking address" may locates into an
-	 * address that is reserved by SoC, then will trigger data abort.
+	 * If CONFIG_ARMV7_SECURE_BASE is true, secure code will not
+	 * bundle with u-boot, and code offsets are fixed. Secure zone
+	 * only needs to be copied from the loading address to
+	 * CONFIG_ARMV7_SECURE_BASE, which is the linking and running
+	 * address for secure code.
 	 *
-	 * The reason that move .rel._secure at the beginning, is to
-	 * avoid hole in the final image.
+	 * If CONFIG_ARMV7_SECURE_BASE is undefined, the secure zone will
+	 * be included in u-boot address space, and some absolute address
+	 * were used in secure code. The absolute addresses of the secure
+	 * code also needs to be relocated along with the accompanying u-boot
+	 * code.
+	 *
+	 * So DISCARD is only for CONFIG_ARMV7_SECURE_BASE.
 	 */
 	/DISCARD/ : { *(.rel._secure*) }
+#endif
 	. = 0x00000000;
 
 	. = ALIGN(4);
@@ -89,6 +90,36 @@ SECTIONS
 
 	. = ALIGN(4);
 
+	.__efi_runtime_start : {
+		*(.__efi_runtime_start)
+	}
+
+	.efi_runtime : {
+		*(efi_runtime_text)
+		*(efi_runtime_data)
+	}
+
+	.__efi_runtime_stop : {
+		*(.__efi_runtime_stop)
+	}
+
+	.efi_runtime_rel_start :
+	{
+		*(.__efi_runtime_rel_start)
+	}
+
+	.efi_runtime_rel : {
+		*(.relefi_runtime_text)
+		*(.relefi_runtime_data)
+	}
+
+	.efi_runtime_rel_stop :
+	{
+		*(.__efi_runtime_rel_stop)
+	}
+
+	. = ALIGN(4);
+
 	.image_copy_end :
 	{
 		*(.__image_copy_end)