X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=arch%2Farm%2Fdts%2Fsama5d2.dtsi;h=4233ef8c189f9b9cd77fe852f600a048f7541a41;hb=56246d1e87050bf22198e95c4526331a94c8a520;hp=8d89b83b530d69d686c21a8f3070e3eef5f8832a;hpb=5c84ad097d829bb1e6460438f33e1536b23b3c9b;p=u-boot

diff --git a/arch/arm/dts/sama5d2.dtsi b/arch/arm/dts/sama5d2.dtsi
index 8d89b83b53..4233ef8c18 100644
--- a/arch/arm/dts/sama5d2.dtsi
+++ b/arch/arm/dts/sama5d2.dtsi
@@ -122,6 +122,7 @@
 					compatible = "atmel,at91sam9x5-clk-utmi";
 					#clock-cells = <0>;
 					clocks = <&main>;
+					regmap-sfr = <&sfr>;
 					u-boot,dm-pre-reloc;
 				};
 
@@ -632,6 +633,39 @@
 				status = "disabled";
 			};
 
+			rstc@f8048000 {
+				compatible = "atmel,sama5d3-rstc";
+				reg = <0xf8048000 0x10>;
+				clocks = <&clk32k>;
+			};
+
+			shdwc@f8048010 {
+				compatible = "atmel,sama5d2-shdwc";
+				reg = <0xf8048010 0x10>;
+				clocks = <&clk32k>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				atmel,wakeup-rtc-timer;
+			};
+
+			pit: timer@f8048030 {
+				compatible = "atmel,at91sam9260-pit";
+				reg = <0xf8048030 0x10>;
+				clocks = <&h32ck>;
+			};
+
+			watchdog@f8048040 {
+				compatible = "atmel,sama5d4-wdt";
+				reg = <0xf8048040 0x10>;
+				clocks = <&clk32k>;
+				status = "disabled";
+			};
+
+			sfr: sfr@f8030000 {
+				compatible = "atmel,sama5d2-sfr", "syscon";
+				reg = <0xf8030000 0x98>;
+			};
+
 			sckc@f8048050 {
 				compatible = "atmel,at91sam9x5-sckc";
 				reg = <0xf8048050 0x4>;