X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=arch%2Farm%2Fdts%2Fzynqmp-zcu102-revA.dts;h=efa94a14194b14ef7cb112bcda7349a42652a1b1;hb=52af7e3e81b92911906e19294df16c77f17fdab6;hp=2be6eb0eb5ebacc06d91617155b5f2dbd66814bf;hpb=e294ba0678359bc32085c1714329af37e33e8f16;p=u-boot

diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts
index 2be6eb0eb5..efa94a1419 100644
--- a/arch/arm/dts/zynqmp-zcu102-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu102-revA.dts
@@ -1,11 +1,10 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * dts file for Xilinx ZynqMP ZCU102 RevA
  *
- * (C) Copyright 2015, Xilinx, Inc.
+ * (C) Copyright 2015 - 2018, Xilinx, Inc.
  *
  * Michal Simek <michal.simek@xilinx.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 /dts-v1/;
@@ -78,7 +77,6 @@
 	status = "okay";
 };
 
-/* fpd_dma clk 667MHz, lpd_dma 500MHz */
 &fpd_dma_chan1 {
 	status = "okay";
 };
@@ -220,7 +218,7 @@
 		 */
 	};
 
-	i2cswitch@75 { /* u60 */
+	i2c-mux@75 { /* u60 */
 		compatible = "nxp,pca9544";
 		#address-cells = <1>;
 		#size-cells = <0>;
@@ -333,72 +331,66 @@
 			reg = <2>;
 			/* MAXIM_PMBUS - 00 */
 			max15301@a { /* u46 */
-				compatible = "max15301";
+				compatible = "maxim,max15301";
 				reg = <0xa>;
 			};
 			max15303@b { /* u4 */
-				compatible = "max15303";
+				compatible = "maxim,max15303";
 				reg = <0xb>;
 			};
 			max15303@10 { /* u13 */
-				compatible = "max15303";
+				compatible = "maxim,max15303";
 				reg = <0x10>;
 			};
 			max15301@13 { /* u47 */
-				compatible = "max15301";
+				compatible = "maxim,max15301";
 				reg = <0x13>;
 			};
 			max15303@14 { /* u7 */
-				compatible = "max15303";
+				compatible = "maxim,max15303";
 				reg = <0x14>;
 			};
 			max15303@15 { /* u6 */
-				compatible = "max15303";
+				compatible = "maxim,max15303";
 				reg = <0x15>;
 			};
 			max15303@16 { /* u10 */
-				compatible = "max15303";
+				compatible = "maxim,max15303";
 				reg = <0x16>;
 			};
 			max15303@17 { /* u9 */
-				compatible = "max15303";
+				compatible = "maxim,max15303";
 				reg = <0x17>;
 			};
 			max15301@18 { /* u63 */
-				compatible = "max15301";
+				compatible = "maxim,max15301";
 				reg = <0x18>;
 			};
 			max15303@1a { /* u49 */
-				compatible = "max15303";
+				compatible = "maxim,max15303";
 				reg = <0x1a>;
 			};
 			max15303@1d { /* u18 */
-				compatible = "max15303";
+				compatible = "maxim,max15303";
 				reg = <0x1d>;
 			};
 			max15303@20 { /* u8 */
-				compatible = "max15303";
+				compatible = "maxim,max15303";
 				status = "disabled"; /* unreachable */
 				reg = <0x20>;
 			};
 
-/*			drivers/hwmon/pmbus/Kconfig:86:   be called max20751.
-drivers/hwmon/pmbus/Makefile:11:obj-$(CONFIG_SENSORS_MAX20751)  += max20751.o
-*/
-			max20751@72 { /* u95 FIXME - not detected */
-				compatible = "max20751";
+			max20751@72 { /* u95 */
+				compatible = "maxim,max20751";
 				reg = <0x72>;
 			};
-			max20751@73 { /* u96 FIXME - not detected */
-				compatible = "max20751";
+			max20751@73 { /* u96 */
+				compatible = "maxim,max20751";
 				reg = <0x73>;
 			};
 		};
 		/* Bus 3 is not connected */
 	};
-
-	/* FIXME PMOD - j160 */
-	/* FIXME MSP430F - u41 - not detected */
 };
 
 &i2c1 {
@@ -410,9 +402,8 @@ drivers/hwmon/pmbus/Makefile:11:obj-$(CONFIG_SENSORS_MAX20751)  += max20751.o
 	scl-gpios = <&gpio 16 GPIO_ACTIVE_HIGH>;
 	sda-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;
 
-	/* FIXME PL i2c via PCA9306 - u45 */
-	/* FIXME MSP430 - u41 - not detected */
-	i2cswitch@74 { /* u34 */
+	/* PL i2c via PCA9306 - u45 */
+	i2c-mux@74 { /* u34 */
 		compatible = "nxp,pca9548";
 		#address-cells = <1>;
 		#size-cells = <0>;
@@ -487,7 +478,7 @@ drivers/hwmon/pmbus/Makefile:11:obj-$(CONFIG_SENSORS_MAX20751)  += max20751.o
 		/* 5 - 7 unconnected */
 	};
 
-	i2cswitch@75 {
+	i2c-mux@75 {
 		compatible = "nxp,pca9548"; /* u135 */
 		#address-cells = <1>;
 		#size-cells = <0>;
@@ -516,24 +507,19 @@ drivers/hwmon/pmbus/Makefile:11:obj-$(CONFIG_SENSORS_MAX20751)  += max20751.o
 			#size-cells = <0>;
 			reg = <3>;
 			/* DDR4 SODIMM */
-			dev@19 { /* u-boot detection */
-				compatible = "xxx";
+			dev@19 {
 				reg = <0x19>;
 			};
-			dev@30 { /* u-boot detection */
-				compatible = "xxx";
+			dev@30 {
 				reg = <0x30>;
 			};
-			dev@35 { /* u-boot detection */
-				compatible = "xxx";
+			dev@35 {
 				reg = <0x35>;
 			};
-			dev@36 { /* u-boot detection */
-				compatible = "xxx";
+			dev@36 {
 				reg = <0x36>;
 			};
-			dev@51 { /* u-boot detection - maybe SPD */
-				compatible = "xxx";
+			dev@51 {
 				reg = <0x51>;
 			};
 		};