X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=arch%2Farm%2Fimx-common%2Fcpu.c;h=40fe813d290b45e08805a19bf0c9dc3b7b35d35d;hb=2c45f8040ea1152d2ff0960f96905ca42ac089cd;hp=e27546c906dc6e0251e0d9a7588de6241657ba0f;hpb=8631c06e9b8563f8196ba26333c8f3a80bf45517;p=u-boot

diff --git a/arch/arm/imx-common/cpu.c b/arch/arm/imx-common/cpu.c
index e27546c906..40fe813d29 100644
--- a/arch/arm/imx-common/cpu.c
+++ b/arch/arm/imx-common/cpu.c
@@ -10,7 +10,7 @@
 #include <bootm.h>
 #include <common.h>
 #include <netdev.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
 #include <asm/io.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/clock.h>
@@ -46,13 +46,28 @@ static char *get_reset_cause(void)
 	case 0x00008:
 		return "IPP USER";
 	case 0x00010:
+#ifdef	CONFIG_MX7
+		return "WDOG1";
+#else
 		return "WDOG";
+#endif
 	case 0x00020:
 		return "JTAG HIGH-Z";
 	case 0x00040:
 		return "JTAG SW";
+	case 0x00080:
+		return "WDOG3";
+#ifdef CONFIG_MX7
+	case 0x00100:
+		return "WDOG4";
+	case 0x00200:
+		return "TEMPSENSE";
+#else
+	case 0x00100:
+		return "TEMPSENSE";
 	case 0x10000:
 		return "WARM BOOT";
+#endif
 	default:
 		return "unknown reset";
 	}
@@ -122,6 +137,10 @@ unsigned imx_ddr_size(void)
 const char *get_imx_type(u32 imxtype)
 {
 	switch (imxtype) {
+	case MXC_CPU_MX7S:
+		return "7S";	/* Single-core version of the mx7 */
+	case MXC_CPU_MX7D:
+		return "7D";	/* Dual-core version of the mx7 */
 	case MXC_CPU_MX6QP:
 		return "6QP";	/* Quad-Plus version of the mx6 */
 	case MXC_CPU_MX6DP:
@@ -136,10 +155,14 @@ const char *get_imx_type(u32 imxtype)
 		return "6SOLO";	/* Solo version of the mx6 */
 	case MXC_CPU_MX6SL:
 		return "6SL";	/* Solo-Lite version of the mx6 */
+	case MXC_CPU_MX6SLL:
+		return "6SLL";	/* SLL version of the mx6 */
 	case MXC_CPU_MX6SX:
 		return "6SX";   /* SoloX version of the mx6 */
 	case MXC_CPU_MX6UL:
 		return "6UL";   /* Ultra-Lite version of the mx6 */
+	case MXC_CPU_MX6ULL:
+		return "6ULL";	/* ULL version of the mx6 */
 	case MXC_CPU_MX51:
 		return "51";
 	case MXC_CPU_MX53:
@@ -154,14 +177,12 @@ int print_cpuinfo(void)
 	u32 cpurev;
 	__maybe_unused u32 max_freq;
 
-#if defined(CONFIG_MX6) && defined(CONFIG_IMX6_THERMAL)
+	cpurev = get_cpu_rev();
+
+#if defined(CONFIG_IMX_THERMAL)
 	struct udevice *thermal_dev;
 	int cpu_tmp, minc, maxc, ret;
-#endif
-
-	cpurev = get_cpu_rev();
 
-#if defined(CONFIG_MX6)
 	printf("CPU:   Freescale i.MX%s rev%d.%d",
 	       get_imx_type((cpurev & 0xFF000) >> 12),
 	       (cpurev & 0x000F0) >> 4,
@@ -181,7 +202,7 @@ int print_cpuinfo(void)
 		mxc_get_clock(MXC_ARM_CLK) / 1000000);
 #endif
 
-#if defined(CONFIG_MX6) && defined(CONFIG_IMX6_THERMAL)
+#if defined(CONFIG_IMX_THERMAL)
 	puts("CPU:   ");
 	switch (get_cpu_temp_grade(&minc, &maxc)) {
 	case TEMP_AUTOMOTIVE:
@@ -205,9 +226,9 @@ int print_cpuinfo(void)
 		if (!ret)
 			printf(" at %dC\n", cpu_tmp);
 		else
-			puts(" - invalid sensor data\n");
+			debug(" - invalid sensor data\n");
 	} else {
-		puts(" - invalid sensor device\n");
+		debug(" - invalid sensor device\n");
 	}
 #endif
 
@@ -238,6 +259,7 @@ int cpu_mmc_init(bd_t *bis)
 }
 #endif
 
+#ifndef CONFIG_MX7
 u32 get_ahb_clk(void)
 {
 	struct mxc_ccm_reg *imx_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
@@ -249,6 +271,7 @@ u32 get_ahb_clk(void)
 
 	return get_periph_clk() / (ahb_podf + 1);
 }
+#endif
 
 void arch_preboot_os(void)
 {
@@ -262,6 +285,9 @@ void arch_preboot_os(void)
 	/* disable video before launching O/S */
 	ipuv3_fb_shutdown();
 #endif
+#if defined(CONFIG_VIDEO_MXS)
+	lcdif_power_down();
+#endif
 }
 
 void set_chipselect_size(int const cs_size)