X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=arch%2Farm%2Fimx-common%2Ftimer.c;h=ee6eff2b28cada0fca04044a90873246d879454f;hb=2c45f8040ea1152d2ff0960f96905ca42ac089cd;hp=65ef60bf2edb0a115d7bc48b1eb35dffa0b41901;hpb=2db8c2d61a05bb4a94bb341329c6de811757c111;p=u-boot

diff --git a/arch/arm/imx-common/timer.c b/arch/arm/imx-common/timer.c
index 65ef60bf2e..ee6eff2b28 100644
--- a/arch/arm/imx-common/timer.c
+++ b/arch/arm/imx-common/timer.c
@@ -43,9 +43,9 @@ DECLARE_GLOBAL_DATA_PTR;
 static inline int gpt_has_clk_source_osc(void)
 {
 #if defined(CONFIG_MX6)
-	if (((is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D)) &&
-	     (is_soc_rev(CHIP_REV_1_0) > 0)) || is_cpu_type(MXC_CPU_MX6DL) ||
-	      is_cpu_type(MXC_CPU_MX6SOLO) || is_cpu_type(MXC_CPU_MX6SX))
+	if (((is_mx6dq()) && (soc_rev() > CHIP_REV_1_0)) ||
+	    is_mx6dqp() || is_mx6sdl() || is_mx6sx() || is_mx6ul() ||
+	    is_mx6ull() || is_mx6sll())
 		return 1;
 
 	return 0;
@@ -65,25 +65,6 @@ static inline ulong gpt_get_clk(void)
 	return MXC_CLK32;
 #endif
 }
-static inline unsigned long long tick_to_time(unsigned long long tick)
-{
-	ulong gpt_clk = gpt_get_clk();
-
-	tick *= CONFIG_SYS_HZ;
-	do_div(tick, gpt_clk);
-
-	return tick;
-}
-
-static inline unsigned long long us_to_tick(unsigned long long usec)
-{
-	ulong gpt_clk = gpt_get_clk();
-
-	usec = usec * gpt_clk + 999999;
-	do_div(usec, 1000000);
-
-	return usec;
-}
 
 int timer_init(void)
 {
@@ -103,10 +84,12 @@ int timer_init(void)
 	if (gpt_has_clk_source_osc()) {
 		i |= GPTCR_CLKSOURCE_OSC | GPTCR_TEN;
 
-		/* For DL/S, SX, set 24Mhz OSC Enable bit and prescaler */
-		if (is_cpu_type(MXC_CPU_MX6DL) ||
-		    is_cpu_type(MXC_CPU_MX6SOLO) ||
-		    is_cpu_type(MXC_CPU_MX6SX)) {
+		/*
+		 * For DL/S, SX, UL, ULL, SLL set 24Mhz OSC
+		 * Enable bit and prescaler
+		 */
+		if (is_mx6sdl() || is_mx6sx() || is_mx6ul() || is_mx6ull() ||
+		    is_mx6sll()) {
 			i |= GPTCR_24MEN;
 
 			/* Produce 3Mhz clock */
@@ -128,44 +111,9 @@ int timer_init(void)
 	return 0;
 }
 
-unsigned long long get_ticks(void)
-{
-	ulong now = __raw_readl(&cur_gpt->counter); /* current tick value */
-
-	/* increment tbu if tbl has rolled over */
-	if (now < gd->arch.tbl)
-		gd->arch.tbu++;
-	gd->arch.tbl = now;
-	return (((unsigned long long)gd->arch.tbu) << 32) | gd->arch.tbl;
-}
-
-ulong get_timer_masked(void)
-{
-	/*
-	 * get_ticks() returns a long long (64 bit), it wraps in
-	 * 2^64 / GPT_CLK = 2^64 / 2^15 = 2^49 ~ 5 * 10^14 (s) ~
-	 * 5 * 10^9 days... and get_ticks() * CONFIG_SYS_HZ wraps in
-	 * 5 * 10^6 days - long enough.
-	 */
-	return tick_to_time(get_ticks());
-}
-
-ulong get_timer(ulong base)
-{
-	return get_timer_masked() - base;
-}
-
-/* delay x useconds AND preserve advance timstamp value */
-void __udelay(unsigned long usec)
+unsigned long timer_read_counter(void)
 {
-	unsigned long long tmp;
-	ulong tmo;
-
-	tmo = us_to_tick(usec);
-	tmp = get_ticks() + tmo;	/* get current timestamp */
-
-	while (get_ticks() < tmp)	/* loop till event */
-		 /*NOP*/;
+	return __raw_readl(&cur_gpt->counter); /* current tick value */
 }
 
 /*
@@ -176,3 +124,19 @@ ulong get_tbclk(void)
 {
 	return gpt_get_clk();
 }
+
+/*
+ * This function is intended for SHORT delays only.
+ * It will overflow at around 10 seconds @ 400MHz,
+ * or 20 seconds @ 200MHz.
+ */
+unsigned long usec2ticks(unsigned long _usec)
+{
+	unsigned long long usec = _usec;
+
+	usec *= get_tbclk();
+	usec += 999999;
+	do_div(usec, 1000000);
+
+	return usec;
+}