X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=arch%2Farm%2Finclude%2Fasm%2Farch-am33xx%2Fhardware.h;h=2dfcc2e65bef0297ecb0a402b421720dbc946fbe;hb=67cafc0861477bf19a587508ed13f4538c7a281e;hp=24a9b8d2d4ce99958e894f2b0ad673fa39a18873;hpb=3ba65f97cbedb39fb486f42f8daa9b9e0d36705a;p=u-boot diff --git a/arch/arm/include/asm/arch-am33xx/hardware.h b/arch/arm/include/asm/arch-am33xx/hardware.h index 24a9b8d2d4..2dfcc2e65b 100644 --- a/arch/arm/include/asm/arch-am33xx/hardware.h +++ b/arch/arm/include/asm/arch-am33xx/hardware.h @@ -5,20 +5,13 @@ * * Copyright (C) 2013, Texas Instruments, Incorporated - http://www.ti.com/ * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the - * GNU General Public License for more details. + * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __AM33XX_HARDWARE_H #define __AM33XX_HARDWARE_H +#include #include #ifdef CONFIG_AM33XX #include @@ -26,8 +19,9 @@ #include #endif -/* Module base addresses */ -#define UART0_BASE 0x44E09000 +/* + * Common hardware definitions + */ /* DM Timer base addresses */ #define DM_TIMER0_BASE 0x4802C000 @@ -42,21 +36,10 @@ /* GPIO Base address */ #define GPIO0_BASE 0x48032000 #define GPIO1_BASE 0x4804C000 -#define GPIO2_BASE 0x481AC000 /* BCH Error Location Module */ #define ELM_BASE 0x48080000 -/* Watchdog Timer */ -#define WDT_BASE 0x44E35000 - -/* Control Module Base Address */ -#define CTRL_BASE 0x44E10000 -#define CTRL_DEVICE_BASE 0x44E10600 - -/* PRCM Base Address */ -#define PRCM_BASE 0x44E00000 - /* EMIF Base address */ #define EMIF4_0_CFG_BASE 0x4C000000 #define EMIF4_1_CFG_BASE 0x4D000000 @@ -90,13 +73,10 @@ /* CPSW Config space */ #define CPSW_BASE 0x4A100000 -#define CPSW_MDIO_BASE 0x4A101000 - -/* RTC base address */ -#define RTC_BASE 0x44E3E000 /* OTG */ #define USB0_OTG_BASE 0x47401000 #define USB1_OTG_BASE 0x47401800 +int clk_get(int clk); #endif /* __AM33XX_HARDWARE_H */