X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=arch%2Farm%2Finclude%2Fasm%2Farch-am33xx%2Fhardware_ti814x.h;h=4509a237dfe64e5e8a88968127b6f59edde9ab66;hb=9ec84f103b3f3e770043b06042e5d2d6f2339e39;hp=a950ac3c188a0ad090fbe228f0517a13839c7f79;hpb=d0f34f10f14853ebe3f75371533708aa0639d830;p=u-boot

diff --git a/arch/arm/include/asm/arch-am33xx/hardware_ti814x.h b/arch/arm/include/asm/arch-am33xx/hardware_ti814x.h
index a950ac3c18..4509a237df 100644
--- a/arch/arm/include/asm/arch-am33xx/hardware_ti814x.h
+++ b/arch/arm/include/asm/arch-am33xx/hardware_ti814x.h
@@ -5,15 +5,7 @@
  *
  * Copyright (C) 2013, Texas Instruments, Incorporated - http://www.ti.com/
  *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE.  See the
- * GNU General Public License for more details.
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef __AM33XX_HARDWARE_TI814X_H
@@ -29,25 +21,41 @@
 
 /* Control Module Base Address */
 #define CTRL_BASE			0x48140000
+#define CTRL_DEVICE_BASE		0x48140600
 
 /* PRCM Base Address */
 #define PRCM_BASE			0x48180000
+#define CM_PER				0x44E00000
+#define CM_WKUP				0x44E00400
+
+#define PRM_RSTCTRL			(PRCM_BASE + 0x00A0)
+#define PRM_RSTST			(PRM_RSTCTRL + 8)
 
 /* PLL Subsystem Base Address */
 #define PLL_SUBSYS_BASE			0x481C5000
 
 /* VTP Base address */
 #define VTP0_CTRL_ADDR			0x48140E0C
+#define VTP1_CTRL_ADDR			0x48140E10
 
 /* DDR Base address */
 #define DDR_PHY_CMD_ADDR		0x47C0C400
 #define DDR_PHY_DATA_ADDR		0x47C0C4C8
+#define DDR_PHY_CMD_ADDR2		0x47C0C800
+#define DDR_PHY_DATA_ADDR2		0x47C0C8C8
 #define DDR_DATA_REGS_NR		4
 
+#define DDRPHY_0_CONFIG_BASE		(CTRL_BASE + 0x1400)
+#define DDRPHY_CONFIG_BASE		DDRPHY_0_CONFIG_BASE
+
 /* CPSW Config space */
 #define CPSW_MDIO_BASE			0x4A100800
 
 /* RTC base address */
 #define RTC_BASE			0x480C0000
 
+/* OTG */
+#define USB0_OTG_BASE			0x47401000
+#define USB1_OTG_BASE			0x47401800
+
 #endif /* __AM33XX_HARDWARE_TI814X_H */