X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=arch%2Farm%2Finclude%2Fasm%2Farch-exynos%2Fsromc.h;h=dc6aae2c50c413f10b43061c8ec3b8f08559c8b1;hb=348e47f766ac228fb02d1af562b2e9a4c69355db;hp=f616bcb37bc0c1782e10d7255ac577a9983d9a77;hpb=b96a661aeadb1b68d1b589b47f99ce9d6b2769df;p=u-boot

diff --git a/arch/arm/include/asm/arch-exynos/sromc.h b/arch/arm/include/asm/arch-exynos/sromc.h
index f616bcb37b..dc6aae2c50 100644
--- a/arch/arm/include/asm/arch-exynos/sromc.h
+++ b/arch/arm/include/asm/arch-exynos/sromc.h
@@ -48,4 +48,22 @@ struct s5p_sromc {
 /* Configure the Band Width and Bank Control Regs for required SROMC Bank */
 void s5p_config_sromc(u32 srom_bank, u32 srom_bw_conf, u32 srom_bc_conf);
 
+enum {
+	FDT_SROM_PMC,
+	FDT_SROM_TACP,
+	FDT_SROM_TAH,
+	FDT_SROM_TCOH,
+	FDT_SROM_TACC,
+	FDT_SROM_TCOS,
+	FDT_SROM_TACS,
+
+	FDT_SROM_TIMING_COUNT,
+};
+
+struct fdt_sromc {
+	u8 bank;	/* srom bank number */
+	u8 width;	/* bus width in bytes */
+	unsigned int timing[FDT_SROM_TIMING_COUNT]; /* timing parameters */
+};
+
 #endif /* __ASM_ARCH_SROMC_H_ */