X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=arch%2Farm%2Finclude%2Fasm%2Farch-omap4%2Fsys_proto.h;h=c9f0b3a14b560e897a7e3ae2517d93242a94156d;hb=edb697cfcc2dda02c5b2a34b3157b8fa8fc01264;hp=c6e3ad26ff29124fd507a5a28d472855e0aad5b9;hpb=087189fb54b49a4656255d60052ad047f974c7d6;p=u-boot diff --git a/arch/arm/include/asm/arch-omap4/sys_proto.h b/arch/arm/include/asm/arch-omap4/sys_proto.h index c6e3ad26ff..c9f0b3a14b 100644 --- a/arch/arm/include/asm/arch-omap4/sys_proto.h +++ b/arch/arm/include/asm/arch-omap4/sys_proto.h @@ -2,30 +2,40 @@ * (C) Copyright 2010 * Texas Instruments, * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier: GPL-2.0+ */ #ifndef _SYS_PROTO_H_ #define _SYS_PROTO_H_ #include -#include +#include #include #include +#include #include +#include + +DECLARE_GLOBAL_DATA_PTR; + +#ifdef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS +extern const struct emif_regs emif_regs_elpida_200_mhz_2cs; +extern const struct emif_regs emif_regs_elpida_380_mhz_1cs; +extern const struct emif_regs emif_regs_elpida_400_mhz_1cs; +extern const struct emif_regs emif_regs_elpida_400_mhz_2cs; +extern const struct dmm_lisa_map_regs lisa_map_2G_x_1_x_2; +extern const struct dmm_lisa_map_regs lisa_map_2G_x_2_x_2; +extern const struct dmm_lisa_map_regs ma_lisa_map_2G_x_2_x_2; +#else +extern const struct lpddr2_device_details elpida_2G_S4_details; +extern const struct lpddr2_device_details elpida_4G_S4_details; +#endif + +#ifdef CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS +extern const struct lpddr2_device_timings jedec_default_timings; +#else +extern const struct lpddr2_device_timings elpida_2G_S4_timings; +#endif struct omap_sysinfo { char *board_string; @@ -36,16 +46,13 @@ void gpmc_init(void); void watchdog_init(void); u32 get_device_type(void); void do_set_mux(u32 base, struct pad_conf_entry const *array, int size); -void set_muxconf_regs_essential(void); -void set_muxconf_regs_non_essential(void); -void sr32(void *, u32, u32, u32); +void set_muxconf_regs(void); u32 wait_on_value(u32, u32, void *, u32); void sdelay(unsigned long); -void set_pl310_ctrl_reg(u32 val); -void omap_rev_string(void); -void setup_clocks_for_console(void); +void setup_early_clocks(void); void prcm_init(void); -void bypass_dpll(u32 *const base); +void do_board_detect(void); +void bypass_dpll(u32 const base); void freq_update_core(void); u32 get_sys_clk_freq(void); u32 omap4_ddr_clk(void); @@ -53,65 +60,15 @@ void cancel_out(u32 *num, u32 *den, u32 den_limit); void sdram_init(void); u32 omap_sdram_size(void); u32 cortex_rev(void); +void save_omap_boot_params(void); void init_omap_revision(void); void do_io_settings(void); -void omap_vc_init(u16 speed_khz); +void sri2c_init(void); int omap_vc_bypass_send_value(u8 sa, u8 reg_addr, u8 reg_data); -/* - * This is used to verify if the configuration header - * was executed by Romcode prior to control of transfer - * to the bootloader. SPL is responsible for saving and - * passing this to the u-boot. - */ -extern struct omap_boot_parameters boot_params; +u32 warm_reset(void); +void force_emif_self_refresh(void); +void setup_warmreset_time(void); -static inline u32 running_from_sdram(void) -{ - u32 pc; - asm volatile ("mov %0, pc" : "=r" (pc)); - return ((pc >= OMAP44XX_DRAM_ADDR_SPACE_START) && - (pc < OMAP44XX_DRAM_ADDR_SPACE_END)); -} - -static inline u8 uboot_loaded_by_spl(void) -{ - /* - * u-boot can be running from sdram either because of configuration - * Header or by SPL. If because of CH, then the romcode sets the - * CHSETTINGS executed bit to true in the boot parameter structure that - * it passes to the bootloader.This parameter is stored in the ch_flags - * variable by both SPL and u-boot.Check out for CHSETTINGS, which is a - * mandatory section if CH is present. - */ - if ((boot_params.ch_flags) & (CH_FLAGS_CHSETTINGS)) - return 0; - else - return running_from_sdram(); -} -/* - * The basic hardware init of OMAP(s_init()) can happen in 4 - * different contexts: - * 1. SPL running from SRAM - * 2. U-Boot running from FLASH - * 3. Non-XIP U-Boot loaded to SDRAM by SPL - * 4. Non-XIP U-Boot loaded to SDRAM by ROM code using the - * Configuration Header feature - * - * This function finds this context. - * Defining as inline may help in compiling out unused functions in SPL - */ -static inline u32 omap_hw_init_context(void) -{ -#ifdef CONFIG_SPL_BUILD - return OMAP_INIT_CONTEXT_SPL; -#else - if (uboot_loaded_by_spl()) - return OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL; - else if (running_from_sdram()) - return OMAP_INIT_CONTEXT_UBOOT_AFTER_CH; - else - return OMAP_INIT_CONTEXT_UBOOT_FROM_NOR; -#endif -} +#define OMAP4_SERVICE_PL310_CONTROL_REG_SET 0x102 #endif