X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=arch%2Farm%2Finclude%2Fasm%2Farch-omap4%2Fsys_proto.h;h=c9f0b3a14b560e897a7e3ae2517d93242a94156d;hb=edb697cfcc2dda02c5b2a34b3157b8fa8fc01264;hp=e19975efaf50f2e84c4e3accdef0fe103af275e6;hpb=bd5053ffa5b8162257537bdb79ba829372423096;p=u-boot

diff --git a/arch/arm/include/asm/arch-omap4/sys_proto.h b/arch/arm/include/asm/arch-omap4/sys_proto.h
index e19975efaf..c9f0b3a14b 100644
--- a/arch/arm/include/asm/arch-omap4/sys_proto.h
+++ b/arch/arm/include/asm/arch-omap4/sys_proto.h
@@ -18,6 +18,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#ifdef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
 extern const struct emif_regs emif_regs_elpida_200_mhz_2cs;
 extern const struct emif_regs emif_regs_elpida_380_mhz_1cs;
 extern const struct emif_regs emif_regs_elpida_400_mhz_1cs;
@@ -25,6 +26,17 @@ extern const struct emif_regs emif_regs_elpida_400_mhz_2cs;
 extern const struct dmm_lisa_map_regs lisa_map_2G_x_1_x_2;
 extern const struct dmm_lisa_map_regs lisa_map_2G_x_2_x_2;
 extern const struct dmm_lisa_map_regs ma_lisa_map_2G_x_2_x_2;
+#else
+extern const struct lpddr2_device_details elpida_2G_S4_details;
+extern const struct lpddr2_device_details elpida_4G_S4_details;
+#endif
+
+#ifdef CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
+extern const struct lpddr2_device_timings jedec_default_timings;
+#else
+extern const struct lpddr2_device_timings elpida_2G_S4_timings;
+#endif
+
 struct omap_sysinfo {
 	char *board_string;
 };
@@ -34,12 +46,12 @@ void gpmc_init(void);
 void watchdog_init(void);
 u32 get_device_type(void);
 void do_set_mux(u32 base, struct pad_conf_entry const *array, int size);
-void set_muxconf_regs_essential(void);
+void set_muxconf_regs(void);
 u32 wait_on_value(u32, u32, void *, u32);
 void sdelay(unsigned long);
-void set_pl310_ctrl_reg(u32 val);
-void setup_clocks_for_console(void);
+void setup_early_clocks(void);
 void prcm_init(void);
+void do_board_detect(void);
 void bypass_dpll(u32 const base);
 void freq_update_core(void);
 u32 get_sys_clk_freq(void);
@@ -52,9 +64,11 @@ void save_omap_boot_params(void);
 void init_omap_revision(void);
 void do_io_settings(void);
 void sri2c_init(void);
-void gpi2c_init(void);
 int omap_vc_bypass_send_value(u8 sa, u8 reg_addr, u8 reg_data);
 u32 warm_reset(void);
 void force_emif_self_refresh(void);
 void setup_warmreset_time(void);
+
+#define OMAP4_SERVICE_PL310_CONTROL_REG_SET	0x102
+
 #endif