X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=arch%2Farm%2Fmach-at91%2Farm926ejs%2Fat91sam9263_devices.c;h=f3f480010a4a1faea67ee067507e94617afd6608;hb=af1b7286d8b2712cff5779d8a1565afed9d9d8e6;hp=6b51d5f355f93c929657d494cab362c125dfd212;hpb=ded4bc3a8ba6e96811f761b358b4c628ec927ade;p=u-boot

diff --git a/arch/arm/mach-at91/arm926ejs/at91sam9263_devices.c b/arch/arm/mach-at91/arm926ejs/at91sam9263_devices.c
index 6b51d5f355..f3f480010a 100644
--- a/arch/arm/mach-at91/arm926ejs/at91sam9263_devices.c
+++ b/arch/arm/mach-at91/arm926ejs/at91sam9263_devices.c
@@ -13,7 +13,7 @@
 #include <common.h>
 #include <asm/io.h>
 #include <asm/arch/at91_common.h>
-#include <asm/arch/at91_pmc.h>
+#include <asm/arch/clk.h>
 #include <asm/arch/gpio.h>
 
 /*
@@ -33,51 +33,40 @@
 
 void at91_serial0_hw_init(void)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
-
 	at91_set_a_periph(AT91_PIO_PORTA, 26, 1);		/* TXD0 */
 	at91_set_a_periph(AT91_PIO_PORTA, 27, PUP);		/* RXD0 */
-	writel(1 << ATMEL_ID_USART0, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_USART0);
 }
 
 void at91_serial1_hw_init(void)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
-
 	at91_set_a_periph(AT91_PIO_PORTD, 0, 1);		/* TXD1 */
 	at91_set_a_periph(AT91_PIO_PORTD, 1, PUP);		/* RXD1 */
-	writel(1 << ATMEL_ID_USART1, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_USART1);
 }
 
 void at91_serial2_hw_init(void)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
-
 	at91_set_a_periph(AT91_PIO_PORTD, 2, 1);		/* TXD2 */
 	at91_set_a_periph(AT91_PIO_PORTD, 3, PUP);		/* RXD2 */
-	writel(1 << ATMEL_ID_USART2, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_USART2);
 }
 
 void at91_seriald_hw_init(void)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
-
 	at91_set_a_periph(AT91_PIO_PORTC, 30, PUP);		/* DRXD */
 	at91_set_a_periph(AT91_PIO_PORTC, 31, 1);		/* DTXD */
-	writel(1 << ATMEL_ID_SYS, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_SYS);
 }
 
 #if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI)
 void at91_spi0_hw_init(unsigned long cs_mask)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
-
 	at91_set_b_periph(AT91_PIO_PORTA, 0, PUP);	/* SPI0_MISO */
 	at91_set_b_periph(AT91_PIO_PORTA, 1, PUP);	/* SPI0_MOSI */
 	at91_set_b_periph(AT91_PIO_PORTA, 2, PUP);	/* SPI0_SPCK */
 
-	/* Enable clock */
-	writel(1 << ATMEL_ID_SPI0, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_SPI0);
 
 	if (cs_mask & (1 << 0)) {
 		at91_set_b_periph(AT91_PIO_PORTA, 5, 1);
@@ -107,14 +96,11 @@ void at91_spi0_hw_init(unsigned long cs_mask)
 
 void at91_spi1_hw_init(unsigned long cs_mask)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
-
 	at91_set_a_periph(AT91_PIO_PORTB, 12, PUP);	/* SPI1_MISO */
 	at91_set_a_periph(AT91_PIO_PORTB, 13, PUP);	/* SPI1_MOSI */
 	at91_set_a_periph(AT91_PIO_PORTB, 14, PUP);	/* SPI1_SPCK */
 
-	/* Enable clock */
-	writel(1 << ATMEL_ID_SPI1, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_SPI1);
 
 	if (cs_mask & (1 << 0)) {
 		at91_set_a_periph(AT91_PIO_PORTB, 15, 1);
@@ -146,9 +132,7 @@ void at91_spi1_hw_init(unsigned long cs_mask)
 #if defined(CONFIG_GENERIC_ATMEL_MCI)
 void at91_mci_hw_init(void)
 {
-	/* Enable mci clock */
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-	writel(1 << ATMEL_ID_MCI1, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_MCI1);
 
 	at91_set_a_periph(AT91_PIO_PORTA, 6, PUP);	/* MCI1_CK */
 
@@ -207,12 +191,9 @@ void at91_uhp_hw_init(void)
 #ifdef CONFIG_AT91_CAN
 void at91_can_hw_init(void)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
-
 	at91_set_a_periph(AT91_PIO_PORTA, 13, 0);	/* CAN_TX */
 	at91_set_a_periph(AT91_PIO_PORTA, 14, 1);	/* CAN_RX */
 
-	/* Enable clock */
-	writel(1 << ATMEL_ID_CAN, &pmc->pcer);
+	at91_periph_clk_enable(ATMEL_ID_CAN);
 }
 #endif