X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=arch%2Farm%2Fmach-at91%2Farm926ejs%2Fclock.c;h=7156185a46fa34cb4e9348111ee307c064fbc4cb;hb=6ab8a2b0ee7541f6e44fd8dca8cbacd8b7f45e65;hp=8d6934e32490dd44b31acddf09b54a1b2a05cdcc;hpb=1d2f74690cace803844bce198a6d5fa1b6cd11f9;p=u-boot diff --git a/arch/arm/mach-at91/arm926ejs/clock.c b/arch/arm/mach-at91/arm926ejs/clock.c index 8d6934e324..7156185a46 100644 --- a/arch/arm/mach-at91/arm926ejs/clock.c +++ b/arch/arm/mach-at91/arm926ejs/clock.c @@ -1,11 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0+ /* * [origin: Linux kernel linux/arch/arm/mach-at91/clock.c] * * Copyright (C) 2005 David Brownell * Copyright (C) 2005 Ivan Kokshaysky * Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD - * - * SPDX-License-Identifier: GPL-2.0+ */ #include @@ -18,6 +17,8 @@ # error You need to define CONFIG_AT91FAMILY in your board config! #endif +#define EN_PLLB_TIMEOUT 500 + DECLARE_GLOBAL_DATA_PTR; static unsigned long at91_css_to_rate(unsigned long css) @@ -160,7 +161,13 @@ int at91_clock_init(unsigned long main_clock) gd->arch.mck_rate_hz = at91_css_to_rate(mckr & AT91_PMC_MCKR_CSS_MASK); freq = gd->arch.mck_rate_hz; +#if defined(CONFIG_AT91SAM9X5) + /* different in prescale on at91sam9x5 */ + freq /= (1 << ((mckr & AT91_PMC_MCKR_PRES_MASK) >> 4)); +#else freq /= (1 << ((mckr & AT91_PMC_MCKR_PRES_MASK) >> 2)); /* prescale */ +#endif + #if defined(CONFIG_AT91SAM9G20) /* mdiv ; (x >> 7) = ((x >> 8) * 2) */ gd->arch.mck_rate_hz = (mckr & AT91_PMC_MCKR_MDIV_MASK) ? @@ -243,9 +250,38 @@ void at91_mck_init(u32 mckr) ; } -void at91_periph_clk_enable(int id) +int at91_pllb_clk_enable(u32 pllbr) { - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; + struct at91_pmc *pmc = (at91_pmc_t *)ATMEL_BASE_PMC; + ulong start_time, tmp_time; + + start_time = get_timer(0); + writel(pllbr, &pmc->pllbr); + while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB) { + tmp_time = get_timer(0); + if ((tmp_time - start_time) > EN_PLLB_TIMEOUT) { + printf("ERROR: failed to enable PLLB\n"); + return -1; + } + } - writel(1 << id, &pmc->pcer); + return 0; +} + +int at91_pllb_clk_disable(void) +{ + struct at91_pmc *pmc = (at91_pmc_t *)ATMEL_BASE_PMC; + ulong start_time, tmp_time; + + start_time = get_timer(0); + writel(0, &pmc->pllbr); + while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != 0) { + tmp_time = get_timer(0); + if ((tmp_time - start_time) > EN_PLLB_TIMEOUT) { + printf("ERROR: failed to disable PLLB\n"); + return -1; + } + } + + return 0; }