X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=arch%2Farm%2Fmach-exynos%2Flowlevel_init.c;h=6c39cb2052f94aabba313f3ec35275388945d4ee;hb=cf226d99426d822d6a40aef6a4dcddf818cba07f;hp=37746078487eda5b6339b6321754bbaafae30d37;hpb=77b55e8cfcee9ce1a973bf4dad3e160dd0be01f3;p=u-boot

diff --git a/arch/arm/mach-exynos/lowlevel_init.c b/arch/arm/mach-exynos/lowlevel_init.c
index 3774607848..6c39cb2052 100644
--- a/arch/arm/mach-exynos/lowlevel_init.c
+++ b/arch/arm/mach-exynos/lowlevel_init.c
@@ -175,7 +175,7 @@ int do_lowlevel_init(void)
 
 	arch_cpu_init();
 
-#ifndef CONFIG_SYS_L2CACHE_OFF
+#if !defined(CONFIG_SYS_L2CACHE_OFF) && defined(CONFIG_EXYNOS5420)
 	/*
 	 * Init L2 cache parameters here for use by boot and resume
 	 *
@@ -188,9 +188,7 @@ int do_lowlevel_init(void)
 	configure_l2_actlr();
 	dsb();
 	isb();
-#endif
 
-#ifdef CONFIG_EXYNOS5420
 	relocate_wait_code();
 
 	/* Reconfigure secondary cores */