X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=arch%2Farm%2Fmach-tegra%2Fivc.c;h=dec7d90c5d3b833ef304e19e42056a60f4f376c6;hb=1154541a528ac8bacdbdaccdb177dc64985fe7cb;hp=cf6626fb12c7d60983ca8600d9d7e865c8a123f9;hpb=4711e7f7af839b41a6d78490257a9e7975494dd3;p=u-boot

diff --git a/arch/arm/mach-tegra/ivc.c b/arch/arm/mach-tegra/ivc.c
index cf6626fb12..dec7d90c5d 100644
--- a/arch/arm/mach-tegra/ivc.c
+++ b/arch/arm/mach-tegra/ivc.c
@@ -493,7 +493,7 @@ static int check_ivc_params(ulong qbase1, ulong qbase2, uint32_t nframes,
 	       (TEGRA_IVC_ALIGN - 1));
 
 	if ((uint64_t)nframes * (uint64_t)frame_size >= 0x100000000) {
-		error("tegra_ivc: nframes * frame_size overflows\n");
+		pr_err("tegra_ivc: nframes * frame_size overflows\n");
 		return -EINVAL;
 	}
 
@@ -503,12 +503,12 @@ static int check_ivc_params(ulong qbase1, ulong qbase2, uint32_t nframes,
 	 */
 	if ((qbase1 & (TEGRA_IVC_ALIGN - 1)) ||
 	    (qbase2 & (TEGRA_IVC_ALIGN - 1))) {
-		error("tegra_ivc: channel start not aligned\n");
+		pr_err("tegra_ivc: channel start not aligned\n");
 		return -EINVAL;
 	}
 
 	if (frame_size & (TEGRA_IVC_ALIGN - 1)) {
-		error("tegra_ivc: frame size not adequately aligned\n");
+		pr_err("tegra_ivc: frame size not adequately aligned\n");
 		return -EINVAL;
 	}
 
@@ -521,7 +521,7 @@ static int check_ivc_params(ulong qbase1, ulong qbase2, uint32_t nframes,
 	}
 
 	if (ret) {
-		error("tegra_ivc: queue regions overlap\n");
+		pr_err("tegra_ivc: queue regions overlap\n");
 		return ret;
 	}