X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=arch%2Farm%2Fmach-uniphier%2Fclk%2Fclk-ld20.c;h=f79fb38535cdffde48967ad50292da063fd13708;hb=87f3dee22b174aa32db8213a3187aa809859c9e2;hp=5bb560cafe1d2bf4101b706ea09a6ccd7966dfe1;hpb=34a93bfb26a197012734a13b755f5bfbdf40e237;p=u-boot

diff --git a/arch/arm/mach-uniphier/clk/clk-ld20.c b/arch/arm/mach-uniphier/clk/clk-ld20.c
index 5bb560cafe..f79fb38535 100644
--- a/arch/arm/mach-uniphier/clk/clk-ld20.c
+++ b/arch/arm/mach-uniphier/clk/clk-ld20.c
@@ -4,14 +4,26 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
+#include <linux/bitops.h>
 #include <linux/io.h>
 
 #include "../init.h"
+#include "../sc64-regs.h"
 
 #define SDCTRL_EMMC_HW_RESET	0x59810280
 
 void uniphier_ld20_clk_init(void)
 {
+	u32 tmp;
+
+	tmp = readl(SC_RSTCTRL6);
+	tmp |= BIT(8);			/* Mali */
+	writel(tmp, SC_RSTCTRL6);
+
+	tmp = readl(SC_CLKCTRL6);
+	tmp |= BIT(8);			/* Mali */
+	writel(tmp, SC_CLKCTRL6);
+
 	/* TODO: use "mmc-pwrseq-emmc" */
 	writel(1, SDCTRL_EMMC_HW_RESET);
 }