X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=arch%2Farm%2Fmach-uniphier%2Fsc-regs.h;h=ad58e10e23d0b6ac7406163418ccb50185be8c61;hb=f2465934b46235287e07473fa4919035ba1a2b68;hp=474b82d24309143fe41c83cdcd4e782b9fb914dd;hpb=107b3fb484ed960f0c269deff9eaf7cc6f83b0de;p=u-boot

diff --git a/arch/arm/mach-uniphier/sc-regs.h b/arch/arm/mach-uniphier/sc-regs.h
index 474b82d243..ad58e10e23 100644
--- a/arch/arm/mach-uniphier/sc-regs.h
+++ b/arch/arm/mach-uniphier/sc-regs.h
@@ -1,7 +1,9 @@
 /*
  * UniPhier SC (System Control) block registers
  *
- * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
+ * Copyright (C) 2011-2015 Panasonic Corporation
+ * Copyright (C) 2015-2016 Socionext Inc.
+ *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */
@@ -9,7 +11,7 @@
 #ifndef ARCH_SC_REGS_H
 #define ARCH_SC_REGS_H
 
-#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3)
+#if defined(CONFIG_ARCH_UNIPHIER_SLD3)
 #define SC_BASE_ADDR			0xf1840000
 #else
 #define SC_BASE_ADDR			0x61840000
@@ -68,6 +70,10 @@
 #define SC_RSTCTRL4_NRST_UMC31		(0x1 <<  5)	/* UMC ch1 */
 #define SC_RSTCTRL4_NRST_UMC30		(0x1 <<  4)	/* UMC ch0 */
 
+#define SC_RSTCTRL5			(SC_BASE_ADDR | 0x2010)
+
+#define SC_RSTCTRL6			(SC_BASE_ADDR | 0x2014)
+
 #define SC_CLKCTRL			(SC_BASE_ADDR | 0x2104)
 #define SC_CLKCTRL_CEN_USB31		(0x1 << 17)	/* USB3 #1 */
 #define SC_CLKCTRL_CEN_USB30		(0x1 << 16)	/* USB3 #0 */