X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=arch%2Fblackfin%2Fcpu%2Fserial.c;h=64340ec67d552c62211aa4ca18b152d6284a5985;hb=3e4d27b06d7484040355e22eec2cbce7335d6dab;hp=02522209d7da0ad8b3429bb7058da0d7e0c3c157;hpb=635f330fc7883a4cc703bc5ea2b90fc7d7f69e10;p=u-boot diff --git a/arch/blackfin/cpu/serial.c b/arch/blackfin/cpu/serial.c index 02522209d7..64340ec67d 100644 --- a/arch/blackfin/cpu/serial.c +++ b/arch/blackfin/cpu/serial.c @@ -38,6 +38,7 @@ */ #include +#include #include #include #include @@ -63,7 +64,7 @@ static size_t cache_count; static uint16_t uart_lsr_save; static uint16_t uart_lsr_read(uint32_t uart_base) { - uint16_t lsr = bfin_read16(&pUART->lsr); + uint16_t lsr = bfin_read(&pUART->lsr); uart_lsr_save |= (lsr & (OE|PE|FE|BI)); return lsr | uart_lsr_save; } @@ -71,7 +72,7 @@ static uint16_t uart_lsr_read(uint32_t uart_base) static void uart_lsr_clear(uint32_t uart_base) { uart_lsr_save = 0; - bfin_write16(&pUART->lsr, bfin_read16(&pUART->lsr) | -1); + bfin_write(&pUART->lsr, bfin_read(&pUART->lsr) | -1); } #else /* When debugging is disabled, we only care about the DR bit, so if other @@ -80,11 +81,11 @@ static void uart_lsr_clear(uint32_t uart_base) */ static inline uint16_t uart_lsr_read(uint32_t uart_base) { - return bfin_read16(&pUART->lsr); + return bfin_read(&pUART->lsr); } static void uart_lsr_clear(uint32_t uart_base) { - bfin_write16(&pUART->lsr, bfin_read16(&pUART->lsr) | -1); + bfin_write(&pUART->lsr, bfin_read(&pUART->lsr) | -1); } #endif @@ -101,7 +102,7 @@ static void uart_putc(uint32_t uart_base, const char c) continue; /* queue the character for transmission */ - bfin_write16(&pUART->thr, c); + bfin_write(&pUART->thr, c); SSYNC(); WATCHDOG_RESET(); @@ -122,7 +123,7 @@ static int uart_getc(uint32_t uart_base) continue; /* grab the new byte */ - uart_rbr_val = bfin_read16(&pUART->rbr); + uart_rbr_val = bfin_read(&pUART->rbr); #ifdef CONFIG_DEBUG_SERIAL /* grab & clear the LSR */ @@ -136,13 +137,13 @@ static int uart_getc(uint32_t uart_base) uint16_t dll, dlh; printf("\n[SERIAL ERROR]\n"); ACCESS_LATCH(); - dll = bfin_read16(&pUART->dll); - dlh = bfin_read16(&pUART->dlh); + dll = bfin_read(&pUART->dll); + dlh = bfin_read(&pUART->dlh); ACCESS_PORT_IER(); printf("\tDLL=0x%x DLH=0x%x\n", dll, dlh); do { --cache_count; - printf("\t%3i: RBR=0x%02x LSR=0x%02x\n", cache_count, + printf("\t%3zu: RBR=0x%02x LSR=0x%02x\n", cache_count, cached_rbr[cache_count], cached_lsr[cache_count]); } while (cache_count > 0); return -1; @@ -153,6 +154,30 @@ static int uart_getc(uint32_t uart_base) return uart_rbr_val; } +#if CONFIG_POST & CONFIG_SYS_POST_UART +# define LOOP(x) x +#else +# define LOOP(x) +#endif + +LOOP( +static void uart_loop(uint32_t uart_base, int state) +{ + u16 mcr; + + /* Drain the TX fifo first so bytes don't come back */ + while (!(uart_lsr_read(uart_base) & TEMT)) + continue; + + mcr = bfin_read(&pUART->mcr); + if (state) + mcr |= LOOP_ENA | MRTS; + else + mcr &= ~(LOOP_ENA | MRTS); + bfin_write(&pUART->mcr, mcr); +} +) + #ifdef CONFIG_SYS_BFIN_UART static void uart_puts(uint32_t uart_base, const char *s) @@ -202,15 +227,23 @@ static void uart##n##_puts(const char *s) \ uart_puts(MMR_UART(n), s); \ } \ \ +LOOP( \ +static void uart##n##_loop(int state) \ +{ \ + uart_loop(MMR_UART(n), state); \ +} \ +) \ +\ struct serial_device bfin_serial##n##_device = { \ .name = "bfin_uart"#n, \ - .init = uart##n##_init, \ - .uninit = uart##n##_uninit, \ + .start = uart##n##_init, \ + .stop = uart##n##_uninit, \ .setbrg = uart##n##_setbrg, \ .getc = uart##n##_getc, \ .tstc = uart##n##_tstc, \ .putc = uart##n##_putc, \ .puts = uart##n##_puts, \ + LOOP(.loop = uart##n##_loop) \ }; #ifdef UART0_DLL @@ -239,7 +272,7 @@ __weak struct serial_device *default_serial_console(void) #endif } -void serial_register_bfin_uart(void) +void bfin_serial_initialize(void) { #ifdef UART0_DLL serial_register(&bfin_serial0_device); @@ -307,6 +340,13 @@ void serial_puts(const char *s) serial_putc(*s++); } +LOOP( +void serial_loop(int state) +{ + uart_loop(UART_DLL, state); +} +) + #endif #endif