X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=arch%2Fmicroblaze%2Fcpu%2Finterrupts.c;h=e5d8894f54471a783efc11b1728f5de73a56e196;hb=9aa65cab73e4873f3e94c6df3d0efd99f3bc9926;hp=f66ec69ee25e64b6b3a701bd8174969b7b32c039;hpb=070b8e0da23ab344153d3d1d1b5ef6caac3134dd;p=u-boot

diff --git a/arch/microblaze/cpu/interrupts.c b/arch/microblaze/cpu/interrupts.c
index f66ec69ee2..e5d8894f54 100644
--- a/arch/microblaze/cpu/interrupts.c
+++ b/arch/microblaze/cpu/interrupts.c
@@ -10,10 +10,13 @@
 
 #include <common.h>
 #include <command.h>
+#include <fdtdec.h>
 #include <malloc.h>
 #include <asm/microblaze_intc.h>
 #include <asm/asm.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 void enable_interrupts(void)
 {
 	debug("Enable interrupts for the whole CPU\n");
@@ -109,13 +112,35 @@ static void intc_init(void)
 	      intc->iar, intc->mer);
 }
 
-int interrupts_init(void)
+int interrupt_init(void)
 {
 	int i;
 
+#ifdef CONFIG_OF_CONTROL
+	const void *blob = gd->fdt_blob;
+	int node = 0;
+
+	debug("INTC: Initialization\n");
+
+	node = fdt_node_offset_by_compatible(blob, node,
+				"xlnx,xps-intc-1.00.a");
+	if (node != -1) {
+		fdt_addr_t base = fdtdec_get_addr(blob, node, "reg");
+		if (base == FDT_ADDR_T_NONE)
+			return -1;
+
+		debug("INTC: Base addr %lx\n", base);
+		intc = (microblaze_intc_t *)base;
+		irq_no = fdtdec_get_int(blob, node, "xlnx,num-intr-inputs", 0);
+		debug("INTC: IRQ NO %x\n", irq_no);
+	} else {
+		return node;
+	}
+#else
 #if defined(CONFIG_SYS_INTC_0_ADDR) && defined(CONFIG_SYS_INTC_0_NUM)
 	intc = (microblaze_intc_t *)CONFIG_SYS_INTC_0_ADDR;
 	irq_no = CONFIG_SYS_INTC_0_NUM;
+#endif
 #endif
 	if (irq_no) {
 		vecs = calloc(1, sizeof(struct irq_action) * irq_no);