X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=arch%2Fmips%2Fcpu%2Fmips32%2Fstart.S;h=70ad198cc9d2a54888d447a8641345bc5faa491a;hb=748bde608a8dfea5b64e186af4d9c27642fe7813;hp=cd8b914da317248a6bd9f4bf1d9d5e37a3f5eed1;hpb=696a3b2a5368360c149335e2a35b8900a78f47fa;p=u-boot

diff --git a/arch/mips/cpu/mips32/start.S b/arch/mips/cpu/mips32/start.S
index cd8b914da3..70ad198cc9 100644
--- a/arch/mips/cpu/mips32/start.S
+++ b/arch/mips/cpu/mips32/start.S
@@ -3,23 +3,7 @@
  *
  *  Copyright (c) 2003	Wolfgang Denk <wd@denx.de>
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #include <asm-offsets.h>
@@ -57,7 +41,7 @@ _start:
 	 nop
 
 	.org 0x10
-#ifdef CONFIG_SYS_XWAY_EBU_BOOTCFG
+#if defined(CONFIG_SYS_XWAY_EBU_BOOTCFG)
 	/*
 	 * Almost all Lantiq XWAY SoC devices have an external bus unit (EBU) to
 	 * access external NOR flashes. If the board boots from NOR flash the
@@ -67,6 +51,12 @@ _start:
 	 */
 	.word CONFIG_SYS_XWAY_EBU_BOOTCFG
 	.word 0x0
+#elif defined(CONFIG_QEMU_MALTA)
+	/*
+	 * Linux expects the Board ID here.
+	 */
+	.word 0x00000420	# 0x420 (Malta Board with CoreLV)
+	.word 0x00000000
 #endif
 
 	.org 0x200
@@ -173,7 +163,7 @@ relocate_code:
 	sub	s1, s2, t0		# s1 <-- relocation offset
 
 	la	t3, in_ram
-	lw	t2, -12(t3)		# t2 <-- uboot_end_data
+	lw	t2, -12(t3)		# t2 <-- __image_copy_end
 	move	t1, a2
 
 	add	gp, s1			# adjust gp
@@ -201,9 +191,10 @@ relocate_code:
 	jr	t0
 	 nop
 
+	.word	__rel_dyn_end
+	.word	__rel_dyn_start
+	.word	__image_copy_end
 	.word	_GLOBAL_OFFSET_TABLE_
-	.word	uboot_end_data
-	.word	uboot_end
 	.word	num_got_entries
 
 in_ram:
@@ -214,19 +205,45 @@ in_ram:
 	 * generated by GNU ld. Skip these reserved entries from relocation.
 	 */
 	lw	t3, -4(t0)		# t3 <-- num_got_entries
-	lw	t4, -16(t0)		# t4 <-- _GLOBAL_OFFSET_TABLE_
-	add	t4, s1			# t4 now holds relocated _G_O_T_
-	addi	t4, t4, 8		# skipping first two entries
+	lw	t8, -8(t0)		# t8 <-- _GLOBAL_OFFSET_TABLE_
+	add	t8, s1			# t8 now holds relocated _G_O_T_
+	addi	t8, t8, 8		# skipping first two entries
 	li	t2, 2
 1:
-	lw	t1, 0(t4)
+	lw	t1, 0(t8)
 	beqz	t1, 2f
 	 add	t1, s1
-	sw	t1, 0(t4)
+	sw	t1, 0(t8)
 2:
 	addi	t2, 1
 	blt	t2, t3, 1b
-	 addi	t4, 4
+	 addi	t8, 4
+
+	/* Update dynamic relocations */
+	lw	t1, -16(t0)		# t1 <-- __rel_dyn_start
+	lw	t2, -20(t0)		# t2 <-- __rel_dyn_end
+
+	b	2f			# skip first reserved entry
+	 addi	t1, 8
+
+1:
+	lw	t8, -4(t1)		# t8 <-- relocation info
+
+	li	t3, 3
+	bne	t8, t3, 2f		# skip non R_MIPS_REL32 entries
+	 nop
+
+	lw	t3, -8(t1)		# t3 <-- location to fix up in FLASH
+
+	lw	t8, 0(t3)		# t8 <-- original pointer
+	add	t8, s1			# t8 <-- adjusted pointer
+
+	add	t3, s1			# t3 <-- location to fix up in RAM
+	sw	t8, 0(t3)
+
+2:
+	blt	t1, t2, 1b
+	 addi	t1, 8			# each rel.dyn entry is 8 bytes
 
 	/*
 	 * Clear BSS