X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=arch%2Fpowerpc%2Fcpu%2Fmpc5xxx%2Fstart.S;h=94eb0d3fff881ae251ea7bdbcee9b2a5ab58d68f;hb=a752a8b4c49d67daa4ea9f9ebac3972bb1c2328b;hp=192aa506a8883d9c2f7ba117370e245d875fa9b2;hpb=aef293bc85dad4f8d645e46d723606a747236a60;p=u-boot diff --git a/arch/powerpc/cpu/mpc5xxx/start.S b/arch/powerpc/cpu/mpc5xxx/start.S index 192aa506a8..94eb0d3fff 100644 --- a/arch/powerpc/cpu/mpc5xxx/start.S +++ b/arch/powerpc/cpu/mpc5xxx/start.S @@ -3,23 +3,7 @@ * Copyright (C) 1999 Magnus Damm * Copyright (C) 2000 - 2003 Wolfgang Denk * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier: GPL-2.0+ */ /* @@ -28,12 +12,8 @@ #include #include #include -#include #include -#define CONFIG_MPC5xxx 1 /* needed for Linux kernel header files */ -#define _LINUX_CONFIG_H 1 /* avoid reading Linux autoconf.h file */ - #include #include @@ -41,10 +21,6 @@ #include #include -#ifndef CONFIG_IDENT_STRING -#define CONFIG_IDENT_STRING "" -#endif - /* We don't want the MMU yet. */ #undef MSR_KERNEL @@ -55,6 +31,7 @@ #define MSR_KERNEL (MSR_FP|MSR_ME|MSR_RI) #endif +#ifndef CONFIG_SPL_BUILD /* * Set up GOT: Global Offset Table * @@ -70,9 +47,10 @@ GOT_ENTRY(transfer_to_handler) GOT_ENTRY(__init_end) - GOT_ENTRY(__bss_end__) + GOT_ENTRY(__bss_end) GOT_ENTRY(__bss_start) END_GOT +#endif /* * Version string @@ -80,9 +58,7 @@ .data .globl version_string version_string: - .ascii U_BOOT_VERSION - .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" - .ascii CONFIG_IDENT_STRING, "\0" + .ascii U_BOOT_VERSION_STRING, "\0" /* * Exception vectors @@ -91,6 +67,33 @@ version_string: . = EXC_OFF_SYS_RESET .globl _start _start: + +#if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD) + /* + * This is the entry of the real U-Boot from a board port + * that supports SPL booting on the MPC5200. We only need + * to call board_init_f() here. Everything else has already + * been done in the SPL u-boot version. + */ + GET_GOT /* initialize GOT access */ + + /* + * The GD (global data) struct needs to get cleared. Lets do + * this by calling memset(). + * This function is called when the platform is build with SPL + * support from the main (full-blown) U-Boot. And the GD needs + * to get cleared (again) so that the following generic + * board support code, defined via CONFIG_SYS_GENERIC_BOARD, + * initializes all variables correctly. + */ + mr r3, r2 /* parameter 1: GD pointer */ + li r4,0 /* parameter 2: value to fill */ + li r5,GD_SIZE /* parameter 3: count */ + bl memset + + bl board_init_f /* run 1st part of board init code (in Flash)*/ + /* NOTREACHED - board_init_f() does not return */ +#else mfmsr r5 /* save msr contents */ /* Move CSBoot and adjust instruction pointer */ @@ -159,7 +162,9 @@ lowboot_reentry: /* Be careful to keep code relocatable ! */ /*--------------------------------------------------------------*/ +#ifndef CONFIG_SPL_BUILD GET_GOT /* initialize GOT access */ +#endif /* r3: IMMR */ bl cpu_init_f /* run low-level CPU init code (in Flash)*/ @@ -167,7 +172,9 @@ lowboot_reentry: bl board_init_f /* run 1st part of board init code (in Flash)*/ /* NOTREACHED - board_init_f() does not return */ +#endif +#ifndef CONFIG_SPL_BUILD /* * Vector Table */ @@ -340,6 +347,7 @@ int_return: lwz r1,GPR1(r1) SYNC rfi +#endif /* CONFIG_SPL_BUILD */ /* * This code initialises the MPC5xxx processor core @@ -529,6 +537,7 @@ get_pvr: mfspr r3, PVR blr +#ifndef CONFIG_SPL_BUILD /*------------------------------------------------------------------------------*/ /* @@ -681,7 +690,7 @@ clear_bss: * Now clear BSS segment */ lwz r3,GOT(__bss_start) - lwz r4,GOT(__bss_end__) + lwz r4,GOT(__bss_end) cmplw 0, r3, r4 beq 6f @@ -766,3 +775,5 @@ trap_init: mtlr r4 /* restore link register */ blr + +#endif /* CONFIG_SPL_BUILD */