X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=arch%2Fpowerpc%2Finclude%2Fasm%2Ffsl_law.h;h=0e255ffce80aba862ea9afeb5d87e4dd55b7fb82;hb=db682a0b59b2e97b24275214f1837197a73fdb03;hp=34c56a259a653c57fa9a822dc86c1100f529e697;hpb=500fbae2043532275e09a8666d837d052c9bad9a;p=u-boot

diff --git a/arch/powerpc/include/asm/fsl_law.h b/arch/powerpc/include/asm/fsl_law.h
index 34c56a259a..0e255ffce8 100644
--- a/arch/powerpc/include/asm/fsl_law.h
+++ b/arch/powerpc/include/asm/fsl_law.h
@@ -1,5 +1,5 @@
 /*
- * Copyright 2008-2009 Freescale Semiconductor, Inc.
+ * Copyright 2008-2010 Freescale Semiconductor, Inc.
  *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License
@@ -47,12 +47,14 @@ enum law_size {
 };
 
 #define law_size_bits(sz)	(__ilog2_u64(sz) - 1)
+#define lawar_size(x)	(1ULL << ((x & 0x3f) + 1))
 
 #ifdef CONFIG_FSL_CORENET
 enum law_trgt_if {
 	LAW_TRGT_IF_PCIE_1 = 0x00,
 	LAW_TRGT_IF_PCIE_2 = 0x01,
 	LAW_TRGT_IF_PCIE_3 = 0x02,
+	LAW_TRGT_IF_PCIE_4 = 0x03,
 	LAW_TRGT_IF_RIO_1 = 0x08,
 	LAW_TRGT_IF_RIO_2 = 0x09,