X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=arch%2Fx86%2Fcpu%2Fcoreboot%2Fsdram.c;h=7115e7a151f331276af7290b9692771e90ab9d2b;hb=2d3c573ee6373f4521491f1a38e81245c3a6be57;hp=ca651c7584e4bde992fe7b415284d444363fbbd4;hpb=07387d1769c7cc29ff2402117148477263c4c5ce;p=u-boot diff --git a/arch/x86/cpu/coreboot/sdram.c b/arch/x86/cpu/coreboot/sdram.c index ca651c7584..7115e7a151 100644 --- a/arch/x86/cpu/coreboot/sdram.c +++ b/arch/x86/cpu/coreboot/sdram.c @@ -7,23 +7,17 @@ */ #include -#include #include -#include -#include -#include -#include -#include #include -#include DECLARE_GLOBAL_DATA_PTR; unsigned install_e820_map(unsigned max_entries, struct e820entry *entries) { + unsigned num_entries; int i; - unsigned num_entries = min(lib_sysinfo.n_memranges, max_entries); + num_entries = min((unsigned)lib_sysinfo.n_memranges, max_entries); if (num_entries < lib_sysinfo.n_memranges) { printf("Warning: Limiting e820 map to %d entries.\n", num_entries); @@ -33,8 +27,18 @@ unsigned install_e820_map(unsigned max_entries, struct e820entry *entries) entries[i].addr = memrange->base; entries[i].size = memrange->size; - entries[i].type = memrange->type; + + /* + * coreboot has some extensions (type 6 & 16) to the E820 types. + * When we detect this, mark it as E820_RESERVED. + */ + if (memrange->type == CB_MEM_VENDOR_RSVD || + memrange->type == CB_MEM_TABLE) + entries[i].type = E820_RESERVED; + else + entries[i].type = memrange->type; } + return num_entries; } @@ -90,16 +94,17 @@ int dram_init(void) unsigned long long end = memrange->base + memrange->size; if (memrange->type == CB_MEM_RAM && end > ram_size) - ram_size = end; + ram_size += memrange->size; } + gd->ram_size = ram_size; if (ram_size == 0) return -1; - return calculate_relocation_address(); + return 0; } -int dram_init_banksize(void) +void dram_init_banksize(void) { int i, j; @@ -116,5 +121,4 @@ int dram_init_banksize(void) } } } - return 0; }