X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=arch%2Fx86%2Finclude%2Fasm%2Fintel_regs.h;h=d2a6d2690e6f2395c958bd70c6c76c1b158f959b;hb=ab5efd576c4e65f056f71eb1ecb7024affaa9a92;hp=961d2bda1ebde3cc12f7717d9f40989600e07204;hpb=bb096b9fad65696798ffd1637b30d9cc7951e70c;p=u-boot

diff --git a/arch/x86/include/asm/intel_regs.h b/arch/x86/include/asm/intel_regs.h
index 961d2bda1e..d2a6d2690e 100644
--- a/arch/x86/include/asm/intel_regs.h
+++ b/arch/x86/include/asm/intel_regs.h
@@ -12,8 +12,17 @@
 #define MCH_BASE_SIZE		0x8000
 #define MCHBAR_REG(reg)		(MCH_BASE_ADDRESS + (reg))
 
+#define MCHBAR_PEI_VERSION	0x5034
+#define MCH_PKG_POWER_LIMIT_LO	0x59a0
+#define MCH_PKG_POWER_LIMIT_HI	0x59a4
+#define MCH_DDR_POWER_LIMIT_LO	0x58e0
+#define MCH_DDR_POWER_LIMIT_HI	0x58e4
+
 /* Access the Root Complex Register Block */
 #define RCB_BASE_ADDRESS	0xfed1c000
 #define RCB_REG(reg)		(RCB_BASE_ADDRESS + (reg))
 
+#define SOFT_RESET_CTRL		0x38f4
+#define SOFT_RESET_DATA		0x38f8
+
 #endif