X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=arch%2Fx86%2Flib%2Ftables.c;h=1213a9cd2b8c3c8b1f765a7314c4329d40a8778d;hb=8a8c0352556cb63c941d9bf1ff58d45c4d27d61d;hp=75ffbc1b220456bd6fbc6f2a266a94129963a01b;hpb=605e15db2b54302364a2528d3c6604fbc57be846;p=u-boot

diff --git a/arch/x86/lib/tables.c b/arch/x86/lib/tables.c
index 75ffbc1b22..1213a9cd2b 100644
--- a/arch/x86/lib/tables.c
+++ b/arch/x86/lib/tables.c
@@ -5,9 +5,39 @@
  */
 
 #include <common.h>
+#include <malloc.h>
 #include <asm/sfi.h>
 #include <asm/mpspec.h>
+#include <asm/smbios.h>
 #include <asm/tables.h>
+#include <asm/acpi_table.h>
+#include <asm/coreboot_tables.h>
+
+/**
+ * Function prototype to write a specific configuration table
+ *
+ * @addr:	start address to write the table
+ * @return:	end address of the table
+ */
+typedef u32 (*table_write)(u32 addr);
+
+static table_write table_write_funcs[] = {
+#ifdef CONFIG_GENERATE_PIRQ_TABLE
+	write_pirq_routing_table,
+#endif
+#ifdef CONFIG_GENERATE_SFI_TABLE
+	write_sfi_table,
+#endif
+#ifdef CONFIG_GENERATE_MP_TABLE
+	write_mp_table,
+#endif
+#ifdef CONFIG_GENERATE_ACPI_TABLE
+	write_acpi_tables,
+#endif
+#ifdef CONFIG_GENERATE_SMBIOS_TABLE
+	write_smbios_table,
+#endif
+};
 
 u8 table_compute_checksum(void *v, int len)
 {
@@ -37,18 +67,38 @@ void table_fill_string(char *dest, const char *src, size_t n, char pad)
 
 void write_tables(void)
 {
-	u32 __maybe_unused rom_table_end = ROM_TABLE_ADDR;
-
-#ifdef CONFIG_GENERATE_PIRQ_TABLE
-	rom_table_end = write_pirq_routing_table(rom_table_end);
-	rom_table_end = ALIGN(rom_table_end, 1024);
+	u32 rom_table_start = ROM_TABLE_ADDR;
+	u32 rom_table_end;
+#ifdef CONFIG_SEABIOS
+	u32 high_table, table_size;
+	struct memory_area cfg_tables[ARRAY_SIZE(table_write_funcs) + 1];
 #endif
-#ifdef CONFIG_GENERATE_SFI_TABLE
-	rom_table_end = write_sfi_table(rom_table_end);
-	rom_table_end = ALIGN(rom_table_end, 1024);
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(table_write_funcs); i++) {
+		rom_table_end = table_write_funcs[i](rom_table_start);
+		rom_table_end = ALIGN(rom_table_end, ROM_TABLE_ALIGN);
+
+#ifdef CONFIG_SEABIOS
+		table_size = rom_table_end - rom_table_start;
+		high_table = (u32)memalign(ROM_TABLE_ALIGN, table_size);
+		if (high_table) {
+			memset((void *)high_table, 0, table_size);
+			table_write_funcs[i](high_table);
+
+			cfg_tables[i].start = high_table;
+			cfg_tables[i].size = table_size;
+		} else {
+			printf("%d: no memory for configuration tables\n", i);
+		}
 #endif
-#ifdef CONFIG_GENERATE_MP_TABLE
-	rom_table_end = write_mp_table(rom_table_end);
-	rom_table_end = ALIGN(rom_table_end, 1024);
+
+		rom_table_start = rom_table_end;
+	}
+
+#ifdef CONFIG_SEABIOS
+	/* make sure the last item is zero */
+	cfg_tables[i].size = 0;
+	write_coreboot_table(CB_TABLE_ADDR, cfg_tables);
 #endif
 }