X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=board%2Falaska%2Falaska.c;h=89c1abd23361e8d72252959ea0a9718b458813c5;hb=ce93dc9bce15434989e01a6fc6d0124a8416b25d;hp=9531703fc936263dc2b7e69fe66a7da0dc657c95;hpb=f2c2a937d8c4a44f63ff88bf82023e03a29497a2;p=u-boot

diff --git a/board/alaska/alaska.c b/board/alaska/alaska.c
index 9531703fc9..89c1abd233 100644
--- a/board/alaska/alaska.c
+++ b/board/alaska/alaska.c
@@ -32,69 +32,69 @@ void setupBat (ulong size)
 	int blocksize = 0;
 
 	/* Flash 0 */
-#if defined (CFG_AMD_BOOT)
-	batu = CFG_FLASH0_BASE | (BL_512K << 2) | BPP_RW | BPP_RX;
+#if defined (CONFIG_SYS_AMD_BOOT)
+	batu = CONFIG_SYS_FLASH0_BASE | BATU_BL_512K | BPP_RW | BPP_RX;
 #else
-	batu = CFG_FLASH0_BASE | (BL_16M << 2) | BPP_RW | BPP_RX;
+	batu = CONFIG_SYS_FLASH0_BASE | BATU_BL_16M | BPP_RW | BPP_RX;
 #endif
-	batl = CFG_FLASH0_BASE | 0x22;
+	batl = CONFIG_SYS_FLASH0_BASE | 0x22;
 	write_bat (IBAT0, batu, batl);
 	write_bat (DBAT0, batu, batl);
 
 	/* Flash 1 */
-#if defined (CFG_AMD_BOOT)
-	batu = CFG_FLASH1_BASE | (BL_16M << 2) | BPP_RW | BPP_RX;
+#if defined (CONFIG_SYS_AMD_BOOT)
+	batu = CONFIG_SYS_FLASH1_BASE | BATU_BL_16M | BPP_RW | BPP_RX;
 #else
-	batu = CFG_FLASH1_BASE | (BL_512K << 2) | BPP_RW | BPP_RX;
+	batu = CONFIG_SYS_FLASH1_BASE | BATU_BL_512K | BPP_RW | BPP_RX;
 #endif
-	batl = CFG_FLASH1_BASE | 0x22;
+	batl = CONFIG_SYS_FLASH1_BASE | 0x22;
 	write_bat (IBAT1, batu, batl);
 	write_bat (DBAT1, batu, batl);
 
 	/* CPLD */
-	batu = CFG_CPLD_BASE | (BL_512K << 2) | BPP_RW | BPP_RX;
-	batl = CFG_CPLD_BASE | 0x22;
+	batu = CONFIG_SYS_CPLD_BASE | BATU_BL_512K | BPP_RW | BPP_RX;
+	batl = CONFIG_SYS_CPLD_BASE | 0x22;
 	write_bat (IBAT2, 0, 0);
 	write_bat (DBAT2, batu, batl);
 
 	/* FPGA */
-	batu = CFG_FPGA_BASE | (BL_512K << 2) | BPP_RW | BPP_RX;
-	batl = CFG_FPGA_BASE | 0x22;
+	batu = CONFIG_SYS_FPGA_BASE | BATU_BL_512K | BPP_RW | BPP_RX;
+	batl = CONFIG_SYS_FPGA_BASE | 0x22;
 	write_bat (IBAT3, 0, 0);
 	write_bat (DBAT3, batu, batl);
 
 	/* MBAR - Data only */
-	batu = CFG_MBAR | BPP_RW | BPP_RX;
-	batl = CFG_MBAR | 0x22;
+	batu = CONFIG_SYS_MBAR | BPP_RW | BPP_RX;
+	batl = CONFIG_SYS_MBAR | 0x22;
 	mtspr (IBAT4L, 0);
 	mtspr (IBAT4U, 0);
 	mtspr (DBAT4L, batl);
 	mtspr (DBAT4U, batu);
 
 	/* MBAR - SRAM */
-	batu = CFG_SRAM_BASE | BPP_RW | BPP_RX;
-	batl = CFG_SRAM_BASE | 0x42;
+	batu = CONFIG_SYS_SRAM_BASE | BPP_RW | BPP_RX;
+	batl = CONFIG_SYS_SRAM_BASE | 0x42;
 	mtspr (IBAT5L, batl);
 	mtspr (IBAT5U, batu);
 	mtspr (DBAT5L, batl);
 	mtspr (DBAT5U, batu);
 
 	if (size <= 0x800000)	/* 8MB */
-		blocksize = BL_8M << 2;
+		blocksize = BATU_BL_8M;
 	else if (size <= 0x1000000)	/* 16MB */
-		blocksize = BL_16M << 2;
+		blocksize = BATU_BL_16M;
 	else if (size <= 0x2000000)	/* 32MB */
-		blocksize = BL_32M << 2;
+		blocksize = BATU_BL_32M;
 	else if (size <= 0x4000000)	/* 64MB */
-		blocksize = BL_64M << 2;
+		blocksize = BATU_BL_64M;
 	else if (size <= 0x8000000)	/* 128MB */
-		blocksize = BL_128M << 2;
+		blocksize = BATU_BL_128M;
 	else if (size <= 0x10000000)	/* 256MB */
-		blocksize = BL_256M << 2;
+		blocksize = BATU_BL_256M;
 
 	/* Memory */
-	batu = CFG_SDRAM_BASE | blocksize | BPP_RW | BPP_RX;
-	batl = CFG_SDRAM_BASE | 0x42;
+	batu = CONFIG_SYS_SDRAM_BASE | blocksize | BPP_RW | BPP_RX;
+	batl = CONFIG_SYS_SDRAM_BASE | 0x42;
 	mtspr (IBAT6L, batl);
 	mtspr (IBAT6U, batu);
 	mtspr (DBAT6L, batl);
@@ -108,21 +108,21 @@ void setupBat (ulong size)
 	} else {
 		size -= 0x10000000;
 		if (size <= 0x800000)	/* 8MB */
-			blocksize = BL_8M << 2;
+			blocksize = BATU_BL_8M;
 		else if (size <= 0x1000000)	/* 16MB */
-			blocksize = BL_16M << 2;
+			blocksize = BATU_BL_16M;
 		else if (size <= 0x2000000)	/* 32MB */
-			blocksize = BL_32M << 2;
+			blocksize = BATU_BL_32M;
 		else if (size <= 0x4000000)	/* 64MB */
-			blocksize = BL_64M << 2;
+			blocksize = BATU_BL_64M;
 		else if (size <= 0x8000000)	/* 128MB */
-			blocksize = BL_128M << 2;
+			blocksize = BATU_BL_128M;
 		else if (size <= 0x10000000)	/* 256MB */
-			blocksize = BL_256M << 2;
+			blocksize = BATU_BL_256M;
 
-		batu = (CFG_SDRAM_BASE +
+		batu = (CONFIG_SYS_SDRAM_BASE +
 			0x10000000) | blocksize | BPP_RW | BPP_RX;
-		batl = (CFG_SDRAM_BASE + 0x10000000) | 0x42;
+		batl = (CONFIG_SYS_SDRAM_BASE + 0x10000000) | 0x42;
 	}
 
 	mtspr (IBAT7L, batl);
@@ -131,7 +131,7 @@ void setupBat (ulong size)
 	mtspr (DBAT7U, batu);
 }
 
-long int initdram (int board_type)
+phys_size_t initdram (int board_type)
 {
 	ulong size;