X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=board%2Famcc%2Fbamboo%2Fbamboo.h;h=49f200aa0b3df7c016ba1d7932632b1f76e695b4;hb=ad99abe8e721b948db3b6ab1c2cf10f3de5560e9;hp=447486297a8232fa20d2a02e0bc6c1f069903ca4;hpb=43f6226db002af1d1ff1adf35b422dcce9f76f76;p=u-boot diff --git a/board/amcc/bamboo/bamboo.h b/board/amcc/bamboo/bamboo.h index 447486297a..49f200aa0b 100644 --- a/board/amcc/bamboo/bamboo.h +++ b/board/amcc/bamboo/bamboo.h @@ -2,23 +2,7 @@ * (C) Copyright 2005 * Stefan Roese, DENX Software Engineering, sr@denx.de. * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier: GPL-2.0+ */ /*----------------------------------------------------------------------------+ @@ -110,17 +94,6 @@ /*----------------------------------------------------------------------------+ | SDR Configuration registers +----------------------------------------------------------------------------*/ -/* Serial Device Strap Reg 0 */ -#define SDR0_SDSTP0 0x0020 -/* Serial Device Strap Reg 1 */ -#define SDR0_SDSTP1 0x0021 -/* Serial Device Strap Reg 2 */ -#define SDR0_SDSTP2 SDR0_STRP2 -/* Serial Device Strap Reg 3 */ -#define SDR0_SDSTP3 SDR0_STRP3 - -#define sdr_pstrp0 0x0040 - #define SDR0_SDSTP1_EBC_ROM_BS_MASK 0x00006000 /* EBC Boot Size Mask */ #define SDR0_SDSTP1_EBC_ROM_BS_32BIT 0x00004000 /* EBC 32 bits */ #define SDR0_SDSTP1_EBC_ROM_BS_16BIT 0x00002000 /* EBC 16 Bits */ @@ -261,9 +234,6 @@ #define PVR_POWERPC_440EP_PASS1 0x42221850 #define PVR_POWERPC_440EP_PASS2 0x422218D3 -#define TRUE 1 -#define FALSE 0 - #define GPIO0 0 #define GPIO1 1