X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=board%2Famcc%2Focotea%2Focotea.c;h=3bd1b81400644515502e487ae4dd8a686b2f0a9a;hb=d1bc6c8d5f4a9c7ca9fb2292d5c65f846dcc3995;hp=5f436eaeee98992c92e2eab974f2773f7649ddc7;hpb=05b47540aae996908e48e10a5ff8b69862aadef3;p=u-boot diff --git a/board/amcc/ocotea/ocotea.c b/board/amcc/ocotea/ocotea.c index 5f436eaeee..3bd1b81400 100644 --- a/board/amcc/ocotea/ocotea.c +++ b/board/amcc/ocotea/ocotea.c @@ -28,7 +28,9 @@ #include "ocotea.h" #include #include -#include <440gx_enet.h> +#include + +DECLARE_GLOBAL_DATA_PTR; #define BOOT_SMALL_FLASH 32 /* 00100000 */ #define FLASH_ONBD_N 2 /* 00000010 */ @@ -186,10 +188,7 @@ int board_early_init_f (void) int checkboard (void) { - sys_info_t sysinfo; - unsigned char *s = getenv ("serial#"); - - get_sys_info (&sysinfo); + char *s = getenv ("serial#"); printf ("Board: Ocotea - AMCC PPC440GX Evaluation Board"); if (s != NULL) { @@ -198,11 +197,6 @@ int checkboard (void) } putc ('\n'); - printf ("\tVCO: %lu MHz\n", sysinfo.freqVCOMhz / 1000000); - printf ("\tCPU: %lu MHz\n", sysinfo.freqProcessor / 1000000); - printf ("\tPLB: %lu MHz\n", sysinfo.freqPLB / 1000000); - printf ("\tOPB: %lu MHz\n", sysinfo.freqOPB / 1000000); - printf ("\tEPB: %lu MHz\n", sysinfo.freqEPB / 1000000); return (0); } @@ -212,7 +206,7 @@ long int initdram (int board_type) long dram_size = 0; #if defined(CONFIG_SPD_EEPROM) - dram_size = spd_sdram (0); + dram_size = spd_sdram (); #else dram_size = fixed_sdram (); #endif @@ -312,7 +306,7 @@ long int fixed_sdram (void) * certain pre-initialization actions. * ************************************************************************/ -#if defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) +#if defined(CONFIG_PCI) int pci_pre_init(struct pci_controller * hose ) { unsigned long strap; @@ -329,7 +323,7 @@ int pci_pre_init(struct pci_controller * hose ) return 1; } -#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */ +#endif /* defined(CONFIG_PCI) */ /************************************************************************* * pci_target_init @@ -342,8 +336,6 @@ int pci_pre_init(struct pci_controller * hose ) #if defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT) void pci_target_init(struct pci_controller * hose ) { - DECLARE_GLOBAL_DATA_PTR; - /*--------------------------------------------------------------------------+ * Disable everything *--------------------------------------------------------------------------*/ @@ -506,6 +498,15 @@ void fpga_init(void) } } + /* + * new Ocotea with Rev. F (pass 3) chips has SMII PHY reset + */ + if ((in8(FPGA_REG0) & FPGA_REG0_ECLS_MASK) == FPGA_REG0_ECLS_VER2) { + out8(FPGA_REG2, in8(FPGA_REG2) & ~FPGA_REG2_SMII_RESET_DISABLE); + udelay(10000); + out8(FPGA_REG2, in8(FPGA_REG2) | FPGA_REG2_SMII_RESET_DISABLE); + } + /* Turn off the LED's */ out8(FPGA_REG3, (in8(FPGA_REG3) & ~FPGA_REG3_STAT_MASK) | FPGA_REG3_STAT_LED8_DISAB | FPGA_REG3_STAT_LED4_DISAB |