X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=board%2Fapollon%2Fapollon.c;h=4768f589791000cfe21c6b1fe22d539ee9aa0ee3;hb=b9d77535e9335b554af03aa0e0a54b664677d018;hp=383b0643f87ddc73c450333b66988671d5303cd4;hpb=ae92069abecc278d7b8de88ffa62de0c2c0ed2bf;p=u-boot

diff --git a/board/apollon/apollon.c b/board/apollon/apollon.c
index 383b0643f8..4768f58979 100644
--- a/board/apollon/apollon.c
+++ b/board/apollon/apollon.c
@@ -24,6 +24,7 @@
  * MA 02111-1307 USA
  */
 #include <common.h>
+#include <netdev.h>
 #include <asm/arch/omap2420.h>
 #include <asm/io.h>
 #include <asm/arch/bits.h>
@@ -94,7 +95,6 @@ void s_init(void)
  ********************************************************/
 int misc_init_r(void)
 {
-	ether_init();		/* better done here so timers are init'ed */
 	return (0);
 }
 
@@ -138,13 +138,14 @@ void wait_for_command_complete(unsigned int wd_base)
 }
 
 /*******************************************************************
- * Routine:ether_init
+ * Routine:board_eth_init
  * Description: take the Ethernet controller out of reset and wait
- *  		   for the EEPROM load to complete.
+ *		   for the EEPROM load to complete.
  ******************************************************************/
-void ether_init(void)
+int board_eth_init(bd_t *bis)
 {
-#ifdef CONFIG_DRIVER_LAN91C96
+	int rc = 0;
+#ifdef CONFIG_LAN91C96
 	int cnt = 20;
 
 	__raw_writeb(0x03, OMAP2420_CTRL_BASE + 0x0f2);	/*protect->gpio74 */
@@ -153,10 +154,8 @@ void ether_init(void)
 	do {
 		__raw_writew(0x1, LAN_RESET_REGISTER);
 		udelay(100);
-		if (cnt == 0) {
-			printf("1. eth reset err\n");
+		if (cnt == 0)
 			goto eth_reset_err_out;
-		}
 		--cnt;
 	} while (__raw_readw(LAN_RESET_REGISTER) != 0x1);
 
@@ -165,20 +164,18 @@ void ether_init(void)
 	do {
 		__raw_writew(0x0, LAN_RESET_REGISTER);
 		udelay(100);
-		if (cnt == 0) {
-			printf("2. eth reset err\n");
+		if (cnt == 0)
 			goto eth_reset_err_out;
-		}
 		--cnt;
 	} while (__raw_readw(LAN_RESET_REGISTER) != 0x0000);
 	udelay(1000);
 
 	mask_config_reg(ETH_CONTROL_REG, 0x01);
 	udelay(1000);
-
+	rc = lan91c96_initialize(0, CONFIG_LAN91C96_BASE);
 eth_reset_err_out:
-	return;
 #endif
+	return rc;
 }
 
 /**********************************************
@@ -249,7 +246,7 @@ void peripheral_enable(void)
 	__raw_writel(v, CM_CLKSEL2_CORE);
 	__raw_writel(0x1, CM_CLKSEL_WKUP);
 
-#ifdef CFG_NS16550
+#ifdef CONFIG_SYS_NS16550
 	/* Enable UART1 clock */
 	func_clks |= BIT21;
 	if_clks |= BIT21;