X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=board%2Fbmw%2FREADME;h=1fbef79e6414522dde050c6b8b82d9868a4b0a96;hb=3f390e15a719900b5e51f13b262ddb2e67349bc2;hp=55ef56ebe1b1eade879fa3b6bf063cefd836a9cc;hpb=f9087a3213cc245cf9b90436475b5af822bd7579;p=u-boot diff --git a/board/bmw/README b/board/bmw/README index 55ef56ebe1..1fbef79e64 100644 --- a/board/bmw/README +++ b/board/bmw/README @@ -20,39 +20,39 @@ BMW uses the MPC8245 CHRP Address MAP B found in the MPC8245 Users Manual onboard the processor module are listed briefly below: 0x00000000 - 0x40000000 - 64MB SDRAM SIMM - (Unregistered PC-100 SDRAM DIMM Module) + (Unregistered PC-100 SDRAM DIMM Module) 0xFF000000 - 0xFF001FFF - M-Systems DiskOnChip (TM) 2000 - TSOP 16MB (MD2211-D16-V3) + TSOP 16MB (MD2211-D16-V3) 0x70000000 - 0x70001FFF - M-Systems DiskOnChip (TM) 2000 - DIP32 (Socketed 16MB - 1GB ) * - NOTE: this is not populated on all systems. + DIP32 (Socketed 16MB - 1GB ) * + NOTE: this is not populated on all systems. 0x7c000000 - 0x7c000000 - Reset Register - (Write 0 to reset) + (Write 0 to reset) 0x7c000001 - 0x7c000001 - System LED - (Clear Bit 7 to turn on, set to shut off) + (Clear Bit 7 to turn on, set to shut off) 0x7c000002 - 0x7c000002 - M48T59 Watchdog IRQ3 - (Clear bit 7 to reset, set to assert IRQ3) + (Clear bit 7 to reset, set to assert IRQ3) 0x7c000003 - 0x7c000003 - M48T59 Write-Protect Register - (Clear bit 7 to make R/W, set to make R/O) + (Clear bit 7 to make R/W, set to make R/O) 0x7c002000 - 0x7c002003 - Infineon OSRAM DLR2416 4 Character - 5x7 Dot Matrix Alphanumeric Display - (Each byte sets the appropriate character) + 5x7 Dot Matrix Alphanumeric Display + (Each byte sets the appropriate character) 0x7c004000 - 0x7c005FF0 - SGS-THOMSON M48T59Y 8K NVRAM/RTC - NVRAM Memory Region + NVRAM Memory Region 0x7c005FF0 - 0x7c005FFF - SGS-THOMSON M48T59Y 8K NVRAM/RTC - Realtime Clock Registers + Realtime Clock Registers 0xFFF00000 - 0xFFF80000 - 512K PLCC32 BootRom - (AMD AM29F040, ST 29W040B) + (AMD AM29F040, ST 29W040B) 0xFFF00100 - System Reset Vector @@ -62,26 +62,26 @@ IO/MMU (BAT) Configuration The following Block-Address-Translation (BAT) configuration is recommended to access all I/O devices. -#define CFG_IBAT0L (0x00000000 | BATL_PP_10 | BATL_MEMCOHERENCE) -#define CFG_IBAT0U (0x00000000 | BATU_BL_256M | BATU_VS | BATU_VP) +#define CONFIG_SYS_IBAT0L (0x00000000 | BATL_PP_10 | BATL_MEMCOHERENCE) +#define CONFIG_SYS_IBAT0U (0x00000000 | BATU_BL_256M | BATU_VS | BATU_VP) -#define CFG_IBAT1L (0x70000000 | BATL_PP_10 | BATL_CACHEINHIBIT) -#define CFG_IBAT1U (0x70000000 | BATU_BL_256M | BATU_VS | BATU_VP) +#define CONFIG_SYS_IBAT1L (0x70000000 | BATL_PP_10 | BATL_CACHEINHIBIT) +#define CONFIG_SYS_IBAT1U (0x70000000 | BATU_BL_256M | BATU_VS | BATU_VP) -#define CFG_IBAT2L (0x80000000 | BATL_PP_10 | BATL_CACHEINHIBIT) -#define CFG_IBAT2U (0x80000000 | BATU_BL_256M | BATU_VS | BATU_VP) +#define CONFIG_SYS_IBAT2L (0x80000000 | BATL_PP_10 | BATL_CACHEINHIBIT) +#define CONFIG_SYS_IBAT2U (0x80000000 | BATU_BL_256M | BATU_VS | BATU_VP) -#define CFG_IBAT3L (0xF0000000 | BATL_PP_10 | BATL_CACHEINHIBIT) -#define CFG_IBAT3U (0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP) +#define CONFIG_SYS_IBAT3L (0xF0000000 | BATL_PP_10 | BATL_CACHEINHIBIT) +#define CONFIG_SYS_IBAT3U (0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP) -#define CFG_DBAT0L CFG_IBAT0L -#define CFG_DBAT0U CFG_IBAT0U -#define CFG_DBAT1L CFG_IBAT1L -#define CFG_DBAT1U CFG_IBAT1U -#define CFG_DBAT2L CFG_IBAT2L -#define CFG_DBAT2U CFG_IBAT2U -#define CFG_DBAT3L CFG_IBAT3L -#define CFG_DBAT3U CFG_IBAT3U +#define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L +#define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U +#define CONFIG_SYS_DBAT1L CONFIG_SYS_IBAT1L +#define CONFIG_SYS_DBAT1U CONFIG_SYS_IBAT1U +#define CONFIG_SYS_DBAT2L CONFIG_SYS_IBAT2L +#define CONFIG_SYS_DBAT2U CONFIG_SYS_IBAT2U +#define CONFIG_SYS_DBAT3L CONFIG_SYS_IBAT3L +#define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U Interrupt Mappings @@ -89,7 +89,7 @@ Interrupt Mappings BMW uses MPC8245 discrete mode interrupts. With the following hardwired mappings: -BCM5701 10/100/1000 Ethernet IRQ1 +BCM5701 10/100/1000 Ethernet IRQ1 CompactPCI Interrupt A IRQ2 RTC/Watchdog Interrupt IRQ3 Internal NS16552 UART IRQ4 @@ -131,7 +131,6 @@ Supported features: - DOC Support - (underway) - U-Boot 1.2.0 (Aug 6 2002 - 17:44:48) CPU: MPC8245 Revision 16.20 at 264 MHz: 16 kB I-Cache 16 kB D-Cache @@ -167,15 +166,10 @@ Environment size: 315/8172 bytes =>boot - - - - - DevTools ======== ELDK - DENX Embedded Linux Development Kit + DENX Embedded Linux Development Kit ROM Emulator Grammar Engine PROMICE P1160-90-AI21E (2MBx8bit, 90ns access time) @@ -187,7 +181,6 @@ ICE WRS/EST VisionICE-II (PPC8240) - =>reset @@ -216,8 +209,8 @@ TFTP from server 172.16.40.111; our IP address is 172.16.40.114 Filename 'vmlinux.img'. Load address: 0x100000 Loading: ################################################################# - ####################################T ############################# - ###################### + ####################################T ############################# + ###################### done Bytes transferred = 777199 (bdbef hex) @@ -317,7 +310,6 @@ Welcome to Linux/PPC MPC8245/BMW - switch-2 login: root Password: PAM_unix[49]: (login) session opened for user root by LOGIN(uid=0) @@ -328,7 +320,6 @@ Welcome to Linux/PPC MPC8245/BMW - login[49]: ROOT LOGIN on `console' root@switch-2:~# cat /proc/cpuinfo