X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=board%2Fchromebook-x86%2Fdts%2Flink.dts;h=4a37dac4ea9adc470005da949b281f0e18923ef6;hb=93e14596;hp=c95ee8a108937cf2d3eb2d4e294cff1586817421;hpb=e62d5fb0da76ef168e90cae9bbbda80349aaf137;p=u-boot

diff --git a/board/chromebook-x86/dts/link.dts b/board/chromebook-x86/dts/link.dts
index c95ee8a108..4a37dac4ea 100644
--- a/board/chromebook-x86/dts/link.dts
+++ b/board/chromebook-x86/dts/link.dts
@@ -3,8 +3,8 @@
 /include/ "coreboot.dtsi"
 
 / {
-        #address-cells = <1>;
-        #size-cells = <1>;
+	#address-cells = <1>;
+	#size-cells = <1>;
 	model = "Google Link";
 	compatible = "google,link", "intel,celeron-ivybridge";
 
@@ -12,15 +12,15 @@
 	       silent_console = <0>;
 	};
 
-        gpio: gpio {};
+	gpio: gpio {};
 
 	serial {
 		reg = <0x3f8 8>;
 		clock-frequency = <115200>;
 	};
 
-        chosen { };
-        memory { device_type = "memory"; reg = <0 0>; };
+	chosen { };
+	memory { device_type = "memory"; reg = <0 0>; };
 
 	spi {
 		#address-cells = <1>;