X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=board%2Fcongatec%2Fconga-qeval20-qa3-e3845%2Fconga-qeval20-qa3.c;h=1283eebd386466fc443513cea9b2137b67e94128;hb=da372af6e40d84e8a47baa41d22dd3e953469b74;hp=6a946d575856989b99bdc444dd8204b4c7e6b258;hpb=312a6c016a2d81aa3fbc605f5c0c315b6a4e3464;p=u-boot diff --git a/board/congatec/conga-qeval20-qa3-e3845/conga-qeval20-qa3.c b/board/congatec/conga-qeval20-qa3-e3845/conga-qeval20-qa3.c index 6a946d5758..1283eebd38 100644 --- a/board/congatec/conga-qeval20-qa3-e3845/conga-qeval20-qa3.c +++ b/board/congatec/conga-qeval20-qa3-e3845/conga-qeval20-qa3.c @@ -5,6 +5,7 @@ */ #include +#include #include #include #include @@ -12,6 +13,7 @@ int board_early_init_f(void) { +#ifndef CONFIG_INTERNAL_UART /* * The FSP enables the BayTrail internal legacy UART (again). * Disable it again, so that the Winbond one can be used. @@ -21,11 +23,46 @@ int board_early_init_f(void) /* Enable the legacy UART in the Winbond W83627 Super IO chip */ winbond_enable_serial(PNP_DEV(WINBOND_IO_PORT, W83627DHG_SP1), UART0_BASE, UART0_IRQ); +#endif return 0; } -int arch_early_init_r(void) +int board_late_init(void) { + struct udevice *dev; + u8 buf[8]; + int ret; + + /* Configure SMSC USB2513 USB Hub: 7bit address 0x2c */ + ret = i2c_get_chip_for_busnum(0, 0x2c, 1, &dev); + if (ret) { + printf("Cannot find USB2513: %d\n", ret); + return 0; + } + + /* + * The first access to the USB Hub fails sometimes, so lets read + * a dummy byte to be sure here + */ + dm_i2c_read(dev, 0x00, buf, 1); + + /* + * The SMSC hub is not visible on the I2C bus after the first + * configuration at power-up. The following code deliberately + * does not report upon failure of these I2C write calls. + */ + buf[0] = 0x93; + dm_i2c_write(dev, 0x06, buf, 1); + + buf[0] = 0xaa; + dm_i2c_write(dev, 0xf8, buf, 1); + + buf[0] = 0x0f; + dm_i2c_write(dev, 0xfa, buf, 1); + + buf[0] = 0x01; + dm_i2c_write(dev, 0xff, buf, 1); + return 0; }