X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=board%2Fcongatec%2Fconga-qeval20-qa3-e3845%2Fconga-qeval20-qa3.c;h=9751337a47473e7a9b9fba17a5e4f64019eff6fb;hb=51dce7d2bfdecd974412634e4a0758ac55edcc00;hp=6a946d575856989b99bdc444dd8204b4c7e6b258;hpb=82ceba2ca2487c4967419cf7053e1301709219e5;p=u-boot

diff --git a/board/congatec/conga-qeval20-qa3-e3845/conga-qeval20-qa3.c b/board/congatec/conga-qeval20-qa3-e3845/conga-qeval20-qa3.c
index 6a946d5758..9751337a47 100644
--- a/board/congatec/conga-qeval20-qa3-e3845/conga-qeval20-qa3.c
+++ b/board/congatec/conga-qeval20-qa3-e3845/conga-qeval20-qa3.c
@@ -1,10 +1,10 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) 2016 Stefan Roese <sr@denx.de>
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #include <common.h>
+#include <i2c.h>
 #include <winbond_w83627.h>
 #include <asm/gpio.h>
 #include <asm/ibmpc.h>
@@ -12,6 +12,7 @@
 
 int board_early_init_f(void)
 {
+#ifndef CONFIG_INTERNAL_UART
 	/*
 	 * The FSP enables the BayTrail internal legacy UART (again).
 	 * Disable it again, so that the Winbond one can be used.
@@ -21,11 +22,46 @@ int board_early_init_f(void)
 	/* Enable the legacy UART in the Winbond W83627 Super IO chip */
 	winbond_enable_serial(PNP_DEV(WINBOND_IO_PORT, W83627DHG_SP1),
 			      UART0_BASE, UART0_IRQ);
+#endif
 
 	return 0;
 }
 
-int arch_early_init_r(void)
+int board_late_init(void)
 {
+	struct udevice *dev;
+	u8 buf[8];
+	int ret;
+
+	/* Configure SMSC USB2513 USB Hub: 7bit address 0x2c */
+	ret = i2c_get_chip_for_busnum(0, 0x2c, 1, &dev);
+	if (ret) {
+		printf("Cannot find USB2513: %d\n", ret);
+		return 0;
+	}
+
+	/*
+	 * The first access to the USB Hub fails sometimes, so lets read
+	 * a dummy byte to be sure here
+	 */
+	dm_i2c_read(dev, 0x00, buf, 1);
+
+	/*
+	 * The SMSC hub is not visible on the I2C bus after the first
+	 * configuration at power-up. The following code deliberately
+	 * does not report upon failure of these I2C write calls.
+	 */
+	buf[0] = 0x93;
+	dm_i2c_write(dev, 0x06, buf, 1);
+
+	buf[0] = 0xaa;
+	dm_i2c_write(dev, 0xf8, buf, 1);
+
+	buf[0] = 0x0f;
+	dm_i2c_write(dev, 0xfa, buf, 1);
+
+	buf[0] = 0x01;
+	dm_i2c_write(dev, 0xff, buf, 1);
+
 	return 0;
 }