X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=board%2Fcray%2FL1%2FL1.c;h=8a06ecc66504e91f4aa4b8b3577c826e62a9b3b2;hb=0d8cb9c04facc029baf4beee5a7e389be343a915;hp=fb28c42a552cee43be19a59089ccd0786f23653e;hpb=c837dcb1a316745092567bfe4fb266d0941884ff;p=u-boot

diff --git a/board/cray/L1/L1.c b/board/cray/L1/L1.c
index fb28c42a55..8a06ecc665 100644
--- a/board/cray/L1/L1.c
+++ b/board/cray/L1/L1.c
@@ -23,7 +23,7 @@
 
 #include <common.h>
 #include <asm/processor.h>
-#include <405gp_i2c.h>
+#include <4xx_i2c.h>
 #include <command.h>
 #include <rtc.h>
 #include <post.h>
@@ -133,20 +133,27 @@ int checkboard (void)
 /* ------------------------------------------------------------------------- */
 int misc_init_r (void)
 {
-	unsigned char *s, *e;
+	char *s, *e;
 	image_header_t *hdr;
 	time_t timestamp;
 	struct rtc_time tm;
 	char bootcmd[32];
 
-	hdr = (image_header_t *) (CFG_MONITOR_BASE - sizeof (image_header_t));
-	timestamp = (time_t) hdr->ih_time;
+	hdr = (image_header_t *) (CONFIG_SYS_MONITOR_BASE - image_get_header_size ());
+#if defined(CONFIG_FIT)
+	if (genimg_get_format ((void *)hdr) != IMAGE_FORMAT_LEGACY) {
+		puts ("Non legacy image format not supported\n");
+		return -1;
+	}
+#endif
+
+	timestamp = (time_t)image_get_time (hdr);
 	to_tm (timestamp, &tm);
 	printf ("Welcome to U-Boot on Cray L1. Compiled %4d-%02d-%02d  %2d:%02d:%02d (UTC)\n", tm.tm_year, tm.tm_mon, tm.tm_mday, tm.tm_hour, tm.tm_min, tm.tm_sec);
 
 #define FACTORY_SETTINGS 0xFFFC0000
 	if ((s = getenv ("ethaddr")) == NULL) {
-		e = (unsigned char *) (FACTORY_SETTINGS);
+		e = (char *) (FACTORY_SETTINGS);
 		if (*(e + 0) != '0'
 			|| *(e + 1) != '0'
 			|| *(e + 2) != ':'
@@ -157,26 +164,26 @@ int misc_init_r (void)
 			setenv ("ethaddr", e);
 		}
 	}
-	sprintf (bootcmd,"autoscript %X",(unsigned)bootscript);
+	sprintf (bootcmd,"source %X",(unsigned)bootscript);
 	setenv ("bootcmd", bootcmd);
 	return (0);
 }
 
 /* ------------------------------------------------------------------------- */
-long int initdram (int board_type)
+phys_size_t initdram (int board_type)
 {
 	return (L1_MEMSIZE);
 }
 
 /* ------------------------------------------------------------------------- */
 /* stubs so we can print dates w/o any nvram RTC.*/
-void rtc_get (struct rtc_time *tmp)
+int rtc_get (struct rtc_time *tmp)
 {
-	return;
+	return 0;
 }
-void rtc_set (struct rtc_time *tmp)
+int rtc_set (struct rtc_time *tmp)
 {
-	return;
+	return 0;
 }
 void rtc_reset (void)
 {
@@ -198,13 +205,13 @@ static void init_sdram (void)
 /* To set the appropriate timings, we need to know the SDRAM speed.	*/
 /* We can use the PLB speed since the SDRAM speed is the same as	*/
 /* the PLB speed. The PLB speed is the FBK divider times the		*/
-/* 405GP reference clock, which on the L1 is 25Mhz.			*/
-/* Thus, if FBK div is 2, SDRAM is 50Mhz; if FBK div is 3, SDRAM is	*/
-/* 150Mhz; if FBK is 3, SDRAM is 150Mhz.				*/
+/* 405GP reference clock, which on the L1 is 25MHz.			*/
+/* Thus, if FBK div is 2, SDRAM is 50MHz; if FBK div is 3, SDRAM is	*/
+/* 150MHz; if FBK is 3, SDRAM is 150MHz.				*/
 
 	/* divisor = ((mfdcr(strap)>> 28) & 0x3); */
 
-/* write SDRAM timing for 100Mhz. */
+/* write SDRAM timing for 100MHz. */
 	mtdcr (memcfga, mem_sdtr1);
 	mtdcr (memcfgd, 0x0086400D);
 
@@ -314,7 +321,7 @@ static u8 *dhcp_env_update (u8 thing, u8 * pop)
 	{
 		setenv (Things[thing].envname, Things[thing].dhcpvalue);
 	}
-	return (Things[thing].dhcpvalue);
+	return ((u8 *)(Things[thing].dhcpvalue));
 }
 
 /* ------------------------------------------------------------------------- */