X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=board%2Fcsb472%2Fcsb472.c;h=eac440848ab15951a24c41a394e66d7c508f14f2;hb=4a207e8b9a1ecc3e87d5a63bb5442dbcd50bd4b6;hp=996a67b4edc4ba559eb6fb48d73cb15cabfcbe01;hpb=83653121d7382fccfe329cb732f77f116341ef1d;p=u-boot diff --git a/board/csb472/csb472.c b/board/csb472/csb472.c index 996a67b4ed..eac440848a 100644 --- a/board/csb472/csb472.c +++ b/board/csb472/csb472.c @@ -25,7 +25,7 @@ #include #include #include -#include +#include void sdram_init(void); @@ -97,7 +97,7 @@ phys_size_t initdram (int board_type) /* * ToDo: Move the asm init routine sdram_init() to this C file, * or even better use some common ppc4xx code available - * in arch/ppc/cpu/ppc4xx + * in arch/powerpc/cpu/ppc4xx */ sdram_init(); @@ -144,11 +144,11 @@ int last_stage_init(void) miiphy_reset("ppc_4xx_eth0", CONFIG_PHY_ADDR); /* AUTO neg */ - miiphy_write("ppc_4xx_eth0", CONFIG_PHY_ADDR, PHY_BMCR, - PHY_BMCR_AUTON | PHY_BMCR_RST_NEG); + miiphy_write("ppc_4xx_eth0", CONFIG_PHY_ADDR, MII_BMCR, + BMCR_ANENABLE | BMCR_ANRESTART); /* LEDs */ - miiphy_write("ppc_4xx_eth0", CONFIG_PHY_ADDR, PHY_FCSCR, 0x0d08); + miiphy_write("ppc_4xx_eth0", CONFIG_PHY_ADDR, MII_NWAYTEST, 0x0d08); return 0; /* success */ }