X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=board%2Fdbau1x00%2Fdbau1x00.c;h=b3c6d512e70fd4a3f298e6410700254b00757b3d;hb=3f390e15a719900b5e51f13b262ddb2e67349bc2;hp=a13eeeb1232306ed84b219493d4367a50d071f4c;hpb=74ac5facb988fc488a707db228b177ead63a6541;p=u-boot

diff --git a/board/dbau1x00/dbau1x00.c b/board/dbau1x00/dbau1x00.c
index a13eeeb123..b3c6d512e7 100644
--- a/board/dbau1x00/dbau1x00.c
+++ b/board/dbau1x00/dbau1x00.c
@@ -27,7 +27,7 @@
 #include <asm/mipsregs.h>
 #include <asm/io.h>
 
-long int initdram(int board_type)
+phys_size_t initdram(int board_type)
 {
 	/* Sdram is setup by assembler code */
 	/* If memory could be changed, we should return the true value here */
@@ -37,7 +37,7 @@ long int initdram(int board_type)
 #define BCSR_PCMCIA_PC0DRVEN		0x0010
 #define BCSR_PCMCIA_PC0RST		0x0080
 
-/* In cpu/mips/cpu.c */
+/* In arch/mips/cpu/cpu.c */
 void write_one_tlb( int index, u32 pagemask, u32 hi, u32 low0, u32 low1 );
 
 int checkboard (void)
@@ -52,7 +52,7 @@ int checkboard (void)
 
 	*sys_counter = 0x100; /* Enable 32 kHz oscillator for RTC/TOY */
 
-	proc_id = read_32bit_cp0_register(CP0_PRID);
+	proc_id = read_c0_prid();
 
 	switch (proc_id >> 24) {
 	case 0:
@@ -106,19 +106,19 @@ int checkboard (void)
 	/* We dont need theese unless we run whole pcmcia package */
 	write_one_tlb(20,                 /* index */
 		      0x01ffe000,         /* Pagemask, 16 MB pages */
-		      CFG_PCMCIA_IO_BASE, /* Hi */
+		      CONFIG_SYS_PCMCIA_IO_BASE, /* Hi */
 		      0x3C000017,         /* Lo0 */
 		      0x3C200017);        /* Lo1 */
 
 	write_one_tlb(21,                   /* index */
 		      0x01ffe000,           /* Pagemask, 16 MB pages */
-		      CFG_PCMCIA_ATTR_BASE, /* Hi */
+		      CONFIG_SYS_PCMCIA_ATTR_BASE, /* Hi */
 		      0x3D000017,           /* Lo0 */
 		      0x3D200017);          /* Lo1 */
 #endif	/* 0 */
 	write_one_tlb(22,                   /* index */
 		      0x01ffe000,           /* Pagemask, 16 MB pages */
-		      CFG_PCMCIA_MEM_ADDR,  /* Hi */
+		      CONFIG_SYS_PCMCIA_MEM_ADDR,  /* Hi */
 		      0x3E000017,           /* Lo0 */
 		      0x3E200017);          /* Lo1 */
 #endif	/* CONFIG_IDE_PCMCIA */