X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=board%2Fdenx%2Fm28evk%2Fm28evk.c;h=aff7c1fe5e6554b886e5ce09a31f3dc7da709ba0;hb=3c016704d9c5418479e68e4690759cb2be6f90d3;hp=53df4761f6033c41577f69ce348c152779b9f6cc;hpb=5bcc6a8901020ce22a996ef438cfc7be7a0c3995;p=u-boot

diff --git a/board/denx/m28evk/m28evk.c b/board/denx/m28evk/m28evk.c
index 53df4761f6..aff7c1fe5e 100644
--- a/board/denx/m28evk/m28evk.c
+++ b/board/denx/m28evk/m28evk.c
@@ -43,20 +43,24 @@ DECLARE_GLOBAL_DATA_PTR;
 int board_early_init_f(void)
 {
 	/* IO0 clock at 480MHz */
-	mx28_set_ioclk(MXC_IOCLK0, 480000);
+	mxs_set_ioclk(MXC_IOCLK0, 480000);
 	/* IO1 clock at 480MHz */
-	mx28_set_ioclk(MXC_IOCLK1, 480000);
+	mxs_set_ioclk(MXC_IOCLK1, 480000);
 
 	/* SSP0 clock at 96MHz */
-	mx28_set_sspclk(MXC_SSPCLK0, 96000, 0);
-	/* SSP2 clock at 96MHz */
-	mx28_set_sspclk(MXC_SSPCLK2, 96000, 0);
+	mxs_set_sspclk(MXC_SSPCLK0, 96000, 0);
+	/* SSP2 clock at 160MHz */
+	mxs_set_sspclk(MXC_SSPCLK2, 160000, 0);
 
 #ifdef	CONFIG_CMD_USB
 	mxs_iomux_setup_pad(MX28_PAD_SSP2_SS1__USB1_OVERCURRENT);
 	mxs_iomux_setup_pad(MX28_PAD_AUART3_TX__GPIO_3_13 |
 			MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP);
 	gpio_direction_output(MX28_PAD_AUART3_TX__GPIO_3_13, 0);
+
+	mxs_iomux_setup_pad(MX28_PAD_AUART3_RX__GPIO_3_12 |
+			MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP);
+	gpio_direction_output(MX28_PAD_AUART3_RX__GPIO_3_12, 0);
 #endif
 
 	return 0;
@@ -72,7 +76,7 @@ int board_init(void)
 
 int dram_init(void)
 {
-	return mx28_dram_init();
+	return mxs_dram_init();
 }
 
 #ifdef	CONFIG_CMD_MMC
@@ -90,8 +94,10 @@ int board_mmc_init(bd_t *bis)
 {
 	/* Configure WP as input. */
 	gpio_direction_input(MX28_PAD_AUART2_CTS__GPIO_3_10);
+	/* Turn on the power to the card. */
+	gpio_direction_output(MX28_PAD_PWM3__GPIO_3_28, 0);
 
-	return mxsmmc_initialize(bis, 0, m28_mmc_wp);
+	return mxsmmc_initialize(bis, 0, m28_mmc_wp, NULL);
 }
 #endif
 
@@ -103,17 +109,25 @@ int board_mmc_init(bd_t *bis)
 
 int fecmxc_mii_postcall(int phy)
 {
+#if	defined(CONFIG_DENX_M28_V11) || defined(CONFIG_DENX_M28_V10)
+	/* KZ8031 PHY on old boards. */
+	const uint32_t freq = 0x0080;
+#else
+	/* KZ8021 PHY on new boards. */
+	const uint32_t freq = 0x0000;
+#endif
+
 	miiphy_write("FEC1", phy, MII_BMCR, 0x9000);
 	miiphy_write("FEC1", phy, MII_OPMODE_STRAP_OVERRIDE, 0x0202);
 	if (phy == 3)
-		miiphy_write("FEC1", 3, MII_PHY_CTRL2, 0x8180);
+		miiphy_write("FEC1", 3, MII_PHY_CTRL2, 0x8100 | freq);
 	return 0;
 }
 
 int board_eth_init(bd_t *bis)
 {
-	struct mx28_clkctrl_regs *clkctrl_regs =
-		(struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE;
+	struct mxs_clkctrl_regs *clkctrl_regs =
+		(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
 	struct eth_device *dev;
 	int ret;
 
@@ -123,6 +137,14 @@ int board_eth_init(bd_t *bis)
 		CLKCTRL_ENET_TIME_SEL_MASK | CLKCTRL_ENET_CLK_OUT_EN,
 		CLKCTRL_ENET_TIME_SEL_RMII_CLK);
 
+#if !defined(CONFIG_DENX_M28_V11) && !defined(CONFIG_DENX_M28_V10)
+	/* Reset the new PHY */
+	gpio_direction_output(MX28_PAD_AUART2_RTS__GPIO_3_11, 0);
+	udelay(10000);
+	gpio_set_value(MX28_PAD_AUART2_RTS__GPIO_3_11, 1);
+	udelay(10000);
+#endif
+
 	ret = fecmxc_initialize_multi(bis, 0, 0, MXS_ENET0_BASE);
 	if (ret) {
 		printf("FEC MXS: Unable to init FEC0\n");