X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=board%2FeNET%2FeNET_pci.c;h=fefb1a4fbeb1efdbe4129f5e482c68d3b2f56165;hb=46198754de3ed3613d4cbc9c204c193b7271e2ad;hp=e80a8feb162b7eb019afb72bac60db319f13335a;hpb=5b34a296d47b236dafbcaf1c91ae11b5aeb1ef51;p=u-boot

diff --git a/board/eNET/eNET_pci.c b/board/eNET/eNET_pci.c
index e80a8feb16..fefb1a4fbe 100644
--- a/board/eNET/eNET_pci.c
+++ b/board/eNET/eNET_pci.c
@@ -93,3 +93,36 @@ void pci_init_board(void)
 {
 	pci_sc520_init(&enet_hose);
 }
+
+int pci_set_regions(struct pci_controller *hose)
+{
+	/* System memory space */
+	pci_set_region(hose->regions + 0,
+		       SC520_PCI_MEMORY_BUS,
+		       SC520_PCI_MEMORY_PHYS,
+		       SC520_PCI_MEMORY_SIZE,
+		       PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
+
+	/* ISA/PCI memory space */
+	pci_set_region(hose->regions + 1,
+		       SC520_ISA_MEM_BUS,
+		       SC520_ISA_MEM_PHYS,
+		       SC520_ISA_MEM_SIZE,
+		       PCI_REGION_MEM);
+
+	/* PCI I/O space */
+	pci_set_region(hose->regions + 2,
+		       SC520_PCI_IO_BUS,
+		       SC520_PCI_IO_PHYS,
+		       SC520_PCI_IO_SIZE,
+		       PCI_REGION_IO);
+
+	/* ISA/PCI I/O space */
+	pci_set_region(hose->regions + 3,
+		       SC520_ISA_IO_BUS,
+		       SC520_ISA_IO_PHYS,
+		       SC520_ISA_IO_SIZE,
+		       PCI_REGION_IO);
+
+	return 4;
+}