X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=board%2FeXalion%2FeXalion.c;h=c17498f064994799831ac9519ff472c4583e754b;hb=530135dcacac278798346ad5825c03131ce51772;hp=385b498d09f287783ae7ae5ca9a7e55955c6dc65;hpb=9973e3c614721bbf169882ffc3be266a6611cd60;p=u-boot

diff --git a/board/eXalion/eXalion.c b/board/eXalion/eXalion.c
index 385b498d09..c17498f064 100644
--- a/board/eXalion/eXalion.c
+++ b/board/eXalion/eXalion.c
@@ -30,6 +30,8 @@
 #include <asm/io.h>
 #include <pci.h>
 #include <ide.h>
+#include <netdev.h>
+#include <timestamp.h>
 #include "piix_pci.h"
 #include "eXalion.h"
 
@@ -39,7 +41,7 @@ int checkboard (void)
 	char buf[32];
 
 	printf ("Board: eXalion MPC824x - CHRP (MAP B)\n");
-	printf ("Built: %s at %s\n", __DATE__, __TIME__);
+	printf ("Built: %s at %s\n", U_BOOT_DATE, U_BOOT_TIME);
 	printf ("Local Bus:  %s MHz\n", strmhz (buf, busfreq));
 
 	return 0;
@@ -55,12 +57,12 @@ int checkflash (void)
 phys_size_t initdram (int board_type)
 {
 	int i, cnt;
-	volatile uchar *base = CFG_SDRAM_BASE;
+	volatile uchar *base = CONFIG_SYS_SDRAM_BASE;
 	volatile ulong *addr;
 	ulong save[32];
 	ulong val, ret = 0;
 
-	for (i = 0, cnt = (CFG_MAX_RAM_SIZE / sizeof (long)) >> 1; cnt > 0;
+	for (i = 0, cnt = (CONFIG_SYS_MAX_RAM_SIZE / sizeof (long)) >> 1; cnt > 0;
 	     cnt >>= 1) {
 		addr = (volatile ulong *) base + cnt;
 		save[i++] = *addr;
@@ -76,7 +78,7 @@ phys_size_t initdram (int board_type)
 		goto Done;
 	}
 
-	for (cnt = 1; cnt <= CFG_MAX_RAM_SIZE / sizeof (long); cnt <<= 1) {
+	for (cnt = 1; cnt <= CONFIG_SYS_MAX_RAM_SIZE / sizeof (long); cnt <<= 1) {
 		addr = (volatile ulong *) base + cnt;
 		val = *addr;
 		*addr = save[--i];
@@ -99,7 +101,7 @@ phys_size_t initdram (int board_type)
 		}
 	}
 
-	ret = CFG_MAX_RAM_SIZE;
+	ret = CONFIG_SYS_MAX_RAM_SIZE;
       Done:
 	return ret;
 }
@@ -290,3 +292,8 @@ void pci_init_board (void)
 {
 	pci_mpc824x_init (&hose);
 }
+
+int board_eth_init(bd_t *bis)
+{
+	return pci_eth_init(bis);
+}