X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=board%2Fesd%2Fcommon%2Fpci.c;h=11e55c5428638f3926c29a8127d07e6d5310ae6e;hb=c083e4bab1679814969405dbde9b75b8b97cf850;hp=f8f180c6c4f4ae964a388386de3877c6912d1796;hpb=c609719b8d1b2dca590e0ed499016d041203e403;p=u-boot

diff --git a/board/esd/common/pci.c b/board/esd/common/pci.c
index f8f180c6c4..11e55c5428 100644
--- a/board/esd/common/pci.c
+++ b/board/esd/common/pci.c
@@ -22,7 +22,7 @@
  */
 
 #include <common.h>
-#include <ppc4xx.h>
+#include <asm/ppc4xx.h>
 #include <asm/processor.h>
 #include <pci.h>
 
@@ -119,24 +119,24 @@ static void pci_dasa_sim_config_pci9054(struct pci_controller *hose, pci_dev_t d
   /*
    * Configure PLX PCI9054
    */
-  pci_read_config_word(CFG_PCI9054_DEV_FN, PCI_COMMAND, &status);
+  pci_read_config_word(CONFIG_SYS_PCI9054_DEV_FN, PCI_COMMAND, &status);
   status |= PCI_COMMAND_MASTER | PCI_COMMAND_IO | PCI_COMMAND_MEMORY;
-  pci_write_config_word(CFG_PCI9054_DEV_FN, PCI_COMMAND, status);
+  pci_write_config_word(CONFIG_SYS_PCI9054_DEV_FN, PCI_COMMAND, status);
 
   /* Check the latency timer for values >= 0x60.
    */
-  pci_read_config_byte(CFG_PCI9054_DEV_FN, PCI_LATENCY_TIMER, &timer);
+  pci_read_config_byte(CONFIG_SYS_PCI9054_DEV_FN, PCI_LATENCY_TIMER, &timer);
   if (timer < 0x60)
     {
-      pci_write_config_byte(CFG_PCI9054_DEV_FN, PCI_LATENCY_TIMER, 0x60);
+      pci_write_config_byte(CONFIG_SYS_PCI9054_DEV_FN, PCI_LATENCY_TIMER, 0x60);
     }
 
   /* Set I/O base register.
    */
-  pci_write_config_dword(CFG_PCI9054_DEV_FN, PCI_BASE_ADDRESS_0, CFG_PCI9054_IOBASE);
-  pci_read_config_dword(CFG_PCI9054_DEV_FN, PCI_BASE_ADDRESS_0, &iobase);
+  pci_write_config_dword(CONFIG_SYS_PCI9054_DEV_FN, PCI_BASE_ADDRESS_0, CONFIG_SYS_PCI9054_IOBASE);
+  pci_read_config_dword(CONFIG_SYS_PCI9054_DEV_FN, PCI_BASE_ADDRESS_0, &iobase);
 
-  pci9054_iobase = pci_mem_to_phys(CFG_PCI9054_DEV_FN, iobase & PCI_BASE_ADDRESS_MEM_MASK);
+  pci9054_iobase = pci_mem_to_phys(CONFIG_SYS_PCI9054_DEV_FN, iobase & PCI_BASE_ADDRESS_MEM_MASK);
 
   if (pci9054_iobase == 0xffffffff)
     {
@@ -149,13 +149,13 @@ static void pci_dasa_sim_config_pci9054(struct pci_controller *hose, pci_dev_t d
 static struct pci_config_table pci9054_config_table[] = {
 #ifndef CONFIG_PCI_PNP
   { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
-    PCI_BUS(CFG_ETH_DEV_FN), PCI_DEV(CFG_ETH_DEV_FN), PCI_FUNC(CFG_ETH_DEV_FN),
-    pci_cfgfunc_config_device, { CFG_ETH_IOBASE,
-				 CFG_ETH_IOBASE,
+    PCI_BUS(CONFIG_SYS_ETH_DEV_FN), PCI_DEV(CONFIG_SYS_ETH_DEV_FN), PCI_FUNC(CONFIG_SYS_ETH_DEV_FN),
+    pci_cfgfunc_config_device, { CONFIG_SYS_ETH_IOBASE,
+				 CONFIG_SYS_ETH_IOBASE,
 				 PCI_COMMAND_IO | PCI_COMMAND_MASTER }},
 #ifdef CONFIG_DASA_SIM
   { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
-    PCI_BUS(CFG_PCI9054_DEV_FN), PCI_DEV(CFG_PCI9054_DEV_FN), PCI_FUNC(CFG_PCI9054_DEV_FN),
+    PCI_BUS(CONFIG_SYS_PCI9054_DEV_FN), PCI_DEV(CONFIG_SYS_PCI9054_DEV_FN), PCI_FUNC(CONFIG_SYS_PCI9054_DEV_FN),
     pci_dasa_sim_config_pci9054 },
 #endif
 #endif
@@ -166,7 +166,7 @@ static struct pci_controller pci9054_hose = {
   config_table: pci9054_config_table,
 };
 
-void pci_init(void)
+void pci_init_board(void)
 {
   struct pci_controller *hose = &pci9054_hose;
 
@@ -179,7 +179,7 @@ void pci_init(void)
   /* System memory space */
   pci_set_region(hose->regions + 0,
 		 0x00000000, 0x00000000, 0x01000000,
-		 PCI_REGION_MEM | PCI_REGION_MEMORY);
+		 PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
 
   /* PCI Memory space */
   pci_set_region(hose->regions + 1,