X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=board%2Fesd%2Fcpci2dp%2Fcpci2dp.c;h=36bf329f8192f8962159f3caaa22b7aea955b746;hb=d87080b721e4f8dca977af7571c5338ae7bb8db7;hp=0949a7d634fa1615270f97ed03f94046506a349b;hpb=a6e6cf00367c0779eadb49915e40c55f0a787957;p=u-boot

diff --git a/board/esd/cpci2dp/cpci2dp.c b/board/esd/cpci2dp/cpci2dp.c
index 0949a7d634..36bf329f81 100644
--- a/board/esd/cpci2dp/cpci2dp.c
+++ b/board/esd/cpci2dp/cpci2dp.c
@@ -12,7 +12,7 @@
  *
  * This program is distributed in the hope that it will be useful,
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
  * GNU General Public License for more details.
  *
  * You should have received a copy of the GNU General Public License
@@ -26,19 +26,22 @@
 #include <command.h>
 #include <malloc.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 int board_early_init_f (void)
 {
 	unsigned long cntrl0Reg;
 
 	/*
-	 * Setup GPIO pins (CS4 as GPIO)
+	 * Setup GPIO pins
 	 */
 	cntrl0Reg = mfdcr(cntrl0);
-	mtdcr(cntrl0, cntrl0Reg | 0x00800000);
+	mtdcr(cntrl0, cntrl0Reg | ((CFG_EEPROM_WP | CFG_PB_LED | CFG_SELF_RST | CFG_INTA_FAKE) << 5));
 
-	out32(GPIO0_OR,  CFG_INTA_FAKE | CFG_EEPROM_WP); /* set output pins to high */
-	out32(GPIO0_ODR, CFG_INTA_FAKE);                 /* INTA# is open drain */
-	out32(GPIO0_TCR, CFG_INTA_FAKE | CFG_EEPROM_WP); /* setup for output        */
+	/* set output pins to high */
+	out32(GPIO0_OR,  CFG_EEPROM_WP);
+	/* setup for output (LED=off) */
+	out32(GPIO0_TCR, CFG_EEPROM_WP | CFG_PB_LED);
 
 	/*
 	 * IRQ 0-15  405GP internally generated; active high; level sensitive
@@ -52,14 +55,14 @@ int board_early_init_f (void)
 	 * IRQ 30 (EXT IRQ 5) PCI SLOT 3; active low; level sensitive
 	 * IRQ 31 (EXT IRQ 6) unused
 	 */
-	mtdcr(uicsr, 0xFFFFFFFF);       /* clear all ints */
-	mtdcr(uicer, 0x00000000);       /* disable all ints */
-	mtdcr(uiccr, 0x00000000);       /* set all to be non-critical*/
-	mtdcr(uicpr, 0xFFFFFF81);       /* set int polarities */
+	mtdcr(uicsr, 0xFFFFFFFF);	/* clear all ints */
+	mtdcr(uicer, 0x00000000);	/* disable all ints */
+	mtdcr(uiccr, 0x00000000);	/* set all to be non-critical*/
+	mtdcr(uicpr, 0xFFFFFF81);	/* set int polarities */
 
-	mtdcr(uictr, 0x10000000);       /* set int trigger levels */
-	mtdcr(uicvcr, 0x00000001);      /* set vect base=0,INT0 highest priority*/
-	mtdcr(uicsr, 0xFFFFFFFF);       /* clear all ints */
+	mtdcr(uictr, 0x10000000);	/* set int trigger levels */
+	mtdcr(uicvcr, 0x00000001);	/* set vect base=0,INT0 highest priority*/
+	mtdcr(uicsr, 0xFFFFFFFF);	/* clear all ints */
 
 	return 0;
 }
@@ -73,7 +76,6 @@ int misc_init_f (void)
 
 int misc_init_r (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
 	unsigned long cntrl0Reg;
 
 	/* adjust flash start and offset */
@@ -95,7 +97,7 @@ int misc_init_r (void)
  */
 int checkboard (void)
 {
-	unsigned char str[64];
+	char str[64];
 	int i = getenv_r ("serial#", str, sizeof(str));
 
 	puts ("Board: ");
@@ -127,30 +129,19 @@ long int initdram (int board_type)
 
 /* ------------------------------------------------------------------------- */
 
-int testdram (void)
-{
-	/* TODO: XXX XXX XXX */
-	printf ("test: 64 MB - ok\n");
-
-	return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-
 #if defined(CFG_EEPROM_WREN)
 /* Input: <dev_addr>  I2C address of EEPROM device to enable.
- *         <state>     -1: deliver current state
- *	               0: disable write
+ *	   <state>     -1: deliver current state
+ *		       0: disable write
  *		       1: enable write
- *  Returns:           -1: wrong device address
- *                      0: dis-/en- able done
+ *  Returns:	       -1: wrong device address
+ *			0: dis-/en- able done
  *		     0/1: current state if <state> was -1.
  */
 int eeprom_write_enable (unsigned dev_addr, int state) {
 	if (CFG_I2C_EEPROM_ADDR != dev_addr) {
 		return -1;
-	}
-	else {
+	} else {
 		switch (state) {
 		case 1:
 			/* Enable write access, clear bit GPIO_SINT2. */
@@ -183,19 +174,16 @@ int do_eep_wren (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 		state = eeprom_write_enable (CFG_I2C_EEPROM_ADDR, -1);
 		if (state < 0) {
 			puts ("Query of write access state failed.\n");
-		}
-		else {
+		} else {
 			printf ("Write access for device 0x%0x is %sabled.\n",
 				CFG_I2C_EEPROM_ADDR, state ? "en" : "dis");
 			state = 0;
 		}
-	}
-	else {
+	} else {
 		if ('0' == argv[1][0]) {
 			/* Disable write access. */
 			state = eeprom_write_enable (CFG_I2C_EEPROM_ADDR, 0);
-		}
-		else {
+		} else {
 			/* Enable write access. */
 			state = eeprom_write_enable (CFG_I2C_EEPROM_ADDR, 1);
 		}
@@ -208,8 +196,8 @@ int do_eep_wren (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 }
 
 U_BOOT_CMD(
-	   eepwren,	2,	0,	do_eep_wren,
-	   "eepwren - Enable / disable / query EEPROM write access\n",
-	   NULL
-	   );
+	eepwren,	2,	0,	do_eep_wren,
+	"eepwren - Enable / disable / query EEPROM write access\n",
+	NULL
+	);
 #endif /* #if defined(CFG_EEPROM_WREN) */