X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=board%2Fesd%2Fdp405%2Fdp405.c;h=587809226fbcd6873588b577920b0b7668e46daa;hb=0208aaf6c2e0f346e8410c0e5adb0ea784f00829;hp=8f4b78d404713570b92d91ba15064e0cf3d7434f;hpb=92afd368bba7d98b2b7bfb51082c3639bb2119b3;p=u-boot

diff --git a/board/esd/dp405/dp405.c b/board/esd/dp405/dp405.c
index 8f4b78d404..587809226f 100644
--- a/board/esd/dp405/dp405.c
+++ b/board/esd/dp405/dp405.c
@@ -43,18 +43,18 @@ int board_early_init_f (void)
 	 * IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive
 	 * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
 	 */
-	mtdcr(uicsr, 0xFFFFFFFF);       /* clear all ints */
-	mtdcr(uicer, 0x00000000);       /* disable all ints */
-	mtdcr(uiccr, 0x00000000);       /* set all to be non-critical*/
-	mtdcr(uicpr, 0xFFFFFF80);       /* set int polarities */
-	mtdcr(uictr, 0x10000000);       /* set int trigger levels */
-	mtdcr(uicvcr, 0x00000001);      /* set vect base=0,INT0 highest priority*/
-	mtdcr(uicsr, 0xFFFFFFFF);       /* clear all ints */
+	mtdcr(UIC0SR, 0xFFFFFFFF);       /* clear all ints */
+	mtdcr(UIC0ER, 0x00000000);       /* disable all ints */
+	mtdcr(UIC0CR, 0x00000000);       /* set all to be non-critical*/
+	mtdcr(UIC0PR, 0xFFFFFF80);       /* set int polarities */
+	mtdcr(UIC0TR, 0x10000000);       /* set int trigger levels */
+	mtdcr(UIC0VCR, 0x00000001);      /* set vect base=0,INT0 highest priority*/
+	mtdcr(UIC0SR, 0xFFFFFFFF);       /* clear all ints */
 
 	/*
 	 * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us
 	 */
-	mtebc (epcr, 0xa8400000); /* ebc always driven */
+	mtebc (EBC0_CFG, 0xa8400000); /* ebc always driven */
 
 	/*
 	 * Reset CPLD via GPIO13 (CS4) pin
@@ -86,7 +86,7 @@ int misc_init_r (void)
 int checkboard (void)
 {
 	char str[64];
-	int i = getenv_r ("serial#", str, sizeof(str));
+	int i = getenv_f("serial#", str, sizeof(str));
 	unsigned char trans[16] = {0x0,0x8,0x4,0xc,0x2,0xa,0x6,0xe,
 				   0x1,0x9,0x5,0xd,0x3,0xb,0x7,0xf};
 	unsigned char id1, id2, rev;
@@ -101,28 +101,28 @@ int checkboard (void)
 	id1 = trans[(~(in_be32((void *)GPIO0_IR) >> 5)) & 0x0000000f];
 	id2 = trans[(~(in_be32((void *)GPIO0_IR) >> 9)) & 0x0000000f];
 
-        rev = in_8((void *)0xf0001000);
-        if (rev & 0x10) /* old DP405 compatibility */
-                rev = in_8((void *)0xf0000800);
-
-        switch (rev & 0xc0) {
-        case 0x00:
-                puts(" (HW=DP405");
-                break;
-        case 0x80:
-                puts(" (HW=DP405/CO");
-                break;
-        case 0xc0:
-                puts(" (HW=DN405");
-                break;
-        }
-        printf(", ID=0x%1X%1X, PLD=0x%02X", id2, id1, rev & 0x0f);
-
-        if ((rev & 0xc0) == 0xc0) {
-                printf(", C5V=%s",
-                       in_be32((void *)GPIO0_IR) & 0x40000000 ? "off" : "on");
-        }
-        puts(")\n");
+	rev = in_8((void *)0xf0001000);
+	if (rev & 0x10) /* old DP405 compatibility */
+		rev = in_8((void *)0xf0000800);
+
+	switch (rev & 0xc0) {
+	case 0x00:
+		puts(" (HW=DP405");
+		break;
+	case 0x80:
+		puts(" (HW=DP405/CO");
+		break;
+	case 0xc0:
+		puts(" (HW=DN405");
+		break;
+	}
+	printf(", ID=0x%1X%1X, PLD=0x%02X", id2, id1, rev & 0x0f);
+
+	if ((rev & 0xc0) == 0xc0) {
+		printf(", C5V=%s",
+		       in_be32((void *)GPIO0_IR) & 0x40000000 ? "off" : "on");
+	}
+	puts(")\n");
 
 	return 0;
 }