X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=board%2Fesd%2Fhub405%2Fhub405.c;h=2a2c4343c0d26b5080a0b414d50cd78559a43878;hb=9c3f2d6670e6151f4f6329f572a62b0d2d6768ce;hp=25c8068fdecc8824b01ffd8f85ef3b5ef37fcbf6;hpb=b706d63559aeec352bc72dd86d7d5423c15f6a60;p=u-boot diff --git a/board/esd/hub405/hub405.c b/board/esd/hub405/hub405.c index 25c8068fde..2a2c4343c0 100644 --- a/board/esd/hub405/hub405.c +++ b/board/esd/hub405/hub405.c @@ -23,6 +23,7 @@ #include #include +#include #include #include @@ -44,22 +45,22 @@ int board_revision(void) /* * Setup GPIO pin(s) (IRQ6/GPIO23) */ - osrl_reg = in32(GPIO0_OSRH); - isr1l_reg = in32(GPIO0_ISR1H); - tcr_reg = in32(GPIO0_TCR); - out32(GPIO0_OSRH, osrl_reg & ~0x00030000); /* output select */ - out32(GPIO0_ISR1H, isr1l_reg | 0x00030000); /* input select */ - out32(GPIO0_TCR, tcr_reg & ~0x00000100); /* select input */ + osrl_reg = in_be32((void *)GPIO0_OSRH); + isr1l_reg = in_be32((void *)GPIO0_ISR1H); + tcr_reg = in_be32((void *)GPIO0_TCR); + out_be32((void *)GPIO0_OSRH, osrl_reg & ~0x00030000); /* output select */ + out_be32((void *)GPIO0_ISR1H, isr1l_reg | 0x00030000); /* input select */ + out_be32((void *)GPIO0_TCR, tcr_reg & ~0x00000100); /* select input */ udelay(1000); /* wait some time before reading input */ - value = in32(GPIO0_IR) & 0x00000100; /* get config bits */ + value = in_be32((void *)GPIO0_IR) & 0x00000100; /* get config bits */ /* * Restore GPIO settings */ - out32(GPIO0_OSRH, osrl_reg); /* output select */ - out32(GPIO0_ISR1H, isr1l_reg); /* input select */ - out32(GPIO0_TCR, tcr_reg); /* enable output driver for outputs */ + out_be32((void *)GPIO0_OSRH, osrl_reg); /* output select */ + out_be32((void *)GPIO0_ISR1H, isr1l_reg); /* input select */ + out_be32((void *)GPIO0_TCR, tcr_reg); /* enable output driver for outputs */ if (value & 0x00000100) { /* Revision 1.1 or 1.2 detected */ @@ -85,36 +86,25 @@ int board_early_init_f (void) * IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive */ - mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */ - mtdcr(uicer, 0x00000000); /* disable all ints */ - mtdcr(uiccr, 0x00000000); /* set all to be non-critical*/ - mtdcr(uicpr, 0xFFFFFF9F); /* set int polarities */ - mtdcr(uictr, 0x10000000); /* set int trigger levels */ - mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority*/ - mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */ + mtdcr(UIC0SR, 0xFFFFFFFF); /* clear all ints */ + mtdcr(UIC0ER, 0x00000000); /* disable all ints */ + mtdcr(UIC0CR, 0x00000000); /* set all to be non-critical*/ + mtdcr(UIC0PR, 0xFFFFFF9F); /* set int polarities */ + mtdcr(UIC0TR, 0x10000000); /* set int trigger levels */ + mtdcr(UIC0VCR, 0x00000001); /* set vect base=0,INT0 highest priority*/ + mtdcr(UIC0SR, 0xFFFFFFFF); /* clear all ints */ /* * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us */ - mtebc (epcr, 0xa8400000); /* ebc always driven */ + mtebc (EBC0_CFG, 0xa8400000); /* ebc always driven */ return 0; } - -int misc_init_f (void) -{ - return 0; /* dummy implementation */ -} - - +#define LED_REG (DUART0_BA + 0x20) int misc_init_r (void) { - volatile unsigned char *duart0_mcr = (unsigned char *)((ulong)DUART0_BA + 4); - volatile unsigned char *duart1_mcr = (unsigned char *)((ulong)DUART1_BA + 4); - volatile unsigned char *duart2_mcr = (unsigned char *)((ulong)DUART2_BA + 4); - volatile unsigned char *duart3_mcr = (unsigned char *)((ulong)DUART3_BA + 4); - volatile unsigned char *led_reg = (unsigned char *)((ulong)DUART0_BA + 0x20); unsigned long val; int delay, flashcnt; char *str; @@ -123,34 +113,35 @@ int misc_init_r (void) /* * Enable interrupts in exar duart mcr[3] */ - *duart0_mcr = 0x08; - *duart1_mcr = 0x08; - *duart2_mcr = 0x08; - *duart3_mcr = 0x08; + out_8((void *)(DUART0_BA + 4), 0x08); + out_8((void *)(DUART1_BA + 4), 0x08); + out_8((void *)(DUART2_BA + 4), 0x08); + out_8((void *)(DUART3_BA + 4), 0x08); /* * Set RS232/RS422 control (RS232 = high on GPIO) */ - val = in32(GPIO0_OR); - val &= ~(CFG_UART2_RS232 | CFG_UART3_RS232 | CFG_UART4_RS232 | CFG_UART5_RS232); + val = in_be32((void *)GPIO0_OR); + val &= ~(CONFIG_SYS_UART2_RS232 | CONFIG_SYS_UART3_RS232 | + CONFIG_SYS_UART4_RS232 | CONFIG_SYS_UART5_RS232); str = getenv("phys0"); if (!str || (str && (str[0] == '0'))) - val |= CFG_UART2_RS232; + val |= CONFIG_SYS_UART2_RS232; str = getenv("phys1"); if (!str || (str && (str[0] == '0'))) - val |= CFG_UART3_RS232; + val |= CONFIG_SYS_UART3_RS232; str = getenv("phys2"); if (!str || (str && (str[0] == '0'))) - val |= CFG_UART4_RS232; + val |= CONFIG_SYS_UART4_RS232; str = getenv("phys3"); if (!str || (str && (str[0] == '0'))) - val |= CFG_UART5_RS232; + val |= CONFIG_SYS_UART5_RS232; - out32(GPIO0_OR, val); + out_be32((void *)GPIO0_OR, val); /* * check board type and setup AP power @@ -167,23 +158,27 @@ int misc_init_r (void) * Flash LEDs */ for (flashcnt = 0; flashcnt < 3; flashcnt++) { - *led_reg = led_reg_default; /* LED_A..D off */ + /* LED_A..D off */ + out_8((void *)LED_REG, led_reg_default); for (delay = 0; delay < 100; delay++) udelay(1000); - *led_reg = led_reg_default | 0xf0; /* LED_A..D on */ + /* LED_A..D on */ + out_8((void *)LED_REG, led_reg_default | 0xf0); for (delay = 0; delay < 50; delay++) udelay(1000); } - *led_reg = led_reg_default; + out_8((void *)LED_REG, led_reg_default); } } /* * Reset external DUARTs */ - out32(GPIO0_OR, in32(GPIO0_OR) | CFG_DUART_RST); /* set reset to high */ + out_be32((void *)GPIO0_OR, + in_be32((void *)GPIO0_OR) | CONFIG_SYS_DUART_RST); /* set reset to high */ udelay(10); /* wait 10us */ - out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_DUART_RST); /* set reset to low */ + out_be32((void *)GPIO0_OR, + in_be32((void *)GPIO0_OR) & ~CONFIG_SYS_DUART_RST); /* set reset to low */ udelay(1000); /* wait 1ms */ /* @@ -227,14 +222,3 @@ int checkboard (void) return 0; } - - -long int initdram (int board_type) -{ - unsigned long val; - - mtdcr(memcfga, mem_mb0cf); - val = mfdcr(memcfgd); - - return (4*1024*1024 << ((val & 0x000e0000) >> 17)); -}