X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=board%2Fesd%2Fpci405%2Fpci405.c;h=e5d2273f07f478e3a9c826c98792906e6b10a98f;hb=90b0cf47eb23e5f3461d3d957f6898386907fd99;hp=dbc3414429c8fda708c724563475c1810deb62d8;hpb=efe2a4d5cf96dd37bc4782ba1880cee4ed1117c5;p=u-boot

diff --git a/board/esd/pci405/pci405.c b/board/esd/pci405/pci405.c
index dbc3414429..e5d2273f07 100644
--- a/board/esd/pci405/pci405.c
+++ b/board/esd/pci405/pci405.c
@@ -30,6 +30,7 @@
 
 #include "pci405.h"
 
+DECLARE_GLOBAL_DATA_PTR;
 
 /* Prototypes */
 int gunzip(void *, int, unsigned char *, unsigned long *);
@@ -77,10 +78,10 @@ int board_revision(void)
 	 */
 	cntrl0Reg = mfdcr(cntrl0);
 	mtdcr(cntrl0, cntrl0Reg | 0x03000000);
-	out32(GPIO0_ODR, in32(GPIO0_ODR) & ~0x00180000);
-	out32(GPIO0_TCR, in32(GPIO0_TCR) & ~0x00180000);
+	out32(GPIO0_ODR, in32(GPIO0_ODR) & ~0x00100200);
+	out32(GPIO0_TCR, in32(GPIO0_TCR) & ~0x00100200);
 	udelay(1000);                   /* wait some time before reading input */
-	value = in32(GPIO0_IR) & 0x00180000;       /* get config bits */
+	value = in32(GPIO0_IR) & 0x00100200;       /* get config bits */
 
 	/*
 	 * Restore GPIO settings
@@ -88,18 +89,18 @@ int board_revision(void)
 	mtdcr(cntrl0, cntrl0Reg);
 
 	switch (value) {
-	case 0x00180000:
-		/* CS2==1 && CS3==1 -> version 1.0 and 1.1 */
+	case 0x00100200:
+		/* CS2==1 && IRQ5==1 -> version 1.0 and 1.1 */
 		return 1;
-	case 0x00080000:
-		/* CS2==0 && CS3==1 -> version 1.2 */
+	case 0x00000200:
+		/* CS2==0 && IRQ5==1 -> version 1.2 */
 		return 2;
+	case 0x00000000:
+		/* CS2==0 && IRQ5==0 -> version 1.3 */
+		return 3;
 #if 0 /* not yet manufactured ! */
 	case 0x00100000:
-		/* CS2==1 && CS3==0 -> version 1.3 */
-		return 3;
-	case 0x00000000:
-		/* CS2==0 && CS3==0 -> version 1.4 */
+		/* CS2==1 && IRQ5==0 -> version 1.4 */
 		return 4;
 #endif
 	default:
@@ -111,8 +112,6 @@ int board_revision(void)
 
 unsigned long fpga_done_state(void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	if (gd->board_type < 2) {
 		return FPGA_DONE_STATE_V11;
 	} else {
@@ -123,8 +122,6 @@ unsigned long fpga_done_state(void)
 
 unsigned long fpga_init_state(void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	if (gd->board_type < 2) {
 		return FPGA_INIT_STATE_V11;
 	} else {
@@ -275,7 +272,7 @@ int misc_init_r (void)
 		 * Rewrite pci config regs (only after soft-reset with magic set)
 		 */
 		ptr = (unsigned int *)PCI_REGS_ADDR;
-		if (crc32(0, (char *)PCI_REGS_ADDR+4, PCI_REGS_LEN-4) == *ptr) {
+		if (crc32(0, (uchar *)PCI_REGS_ADDR+4, PCI_REGS_LEN-4) == *ptr) {
 			puts("Restoring PCI Configurations Regs!\n");
 			ptr = (unsigned int *)PCI_REGS_ADDR + 1;
 			for (i=0; i<0x40; i+=4) {
@@ -306,7 +303,7 @@ int misc_init_r (void)
 /*	mtspr(ccr0, (mfspr(ccr0) & 0xff8fffff) | 0x00100000);	*/
 	mtspr(ccr0, (mfspr(ccr0) & 0xff8fffff) | 0x00000000);
 #endif
-/*	printf("CCR0=%08x\n", mfspr(ccr0)); /* test-only */	*/
+/*	printf("CCR0=%08x\n", mfspr(ccr0)); */ /* test-only */
 #endif
 
 	free(dst);
@@ -320,9 +317,7 @@ int misc_init_r (void)
 
 int checkboard (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
-	unsigned char str[64];
+	char str[64];
 	int i = getenv_r ("serial#", str, sizeof(str));
 
 	puts ("Board: ");
@@ -393,3 +388,48 @@ int testdram (void)
 }
 
 /* ------------------------------------------------------------------------- */
+int wpeeprom(int wp)
+{
+	int wp_state = wp;
+	volatile unsigned char *uart1_mcr = (volatile unsigned char *)0xef600404;
+
+	if (wp == 1) {
+		*uart1_mcr &= ~0x02;
+	} else if (wp == 0) {
+		*uart1_mcr |= 0x02;
+	} else {
+		if (*uart1_mcr & 0x02) {
+			wp_state = 0;
+		} else {
+			wp_state = 1;
+		}
+	}
+	return wp_state;
+}
+
+int do_wpeeprom(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+	int wp = -1;
+	if (argc >= 2) {
+		if (argv[1][0] == '1') {
+			wp = 1;
+		} else if (argv[1][0] == '0') {
+			wp = 0;
+		}
+	}
+
+	wp = wpeeprom(wp);
+	printf("EEPROM write protection %s\n", wp ? "ENABLED" : "DISABLED");
+	return 0;
+}
+
+U_BOOT_CMD(
+	wpeeprom,	2,	1,	do_wpeeprom,
+	"wpeeprom - Check/Enable/Disable I2C EEPROM write protection\n",
+	"wpeeprom\n"
+	"    - check I2C EEPROM write protection state\n"
+	"wpeeprom 1\n"
+	"    - enable I2C EEPROM write protection\n"
+	"wpeeprom 0\n"
+	"    - disable I2C EEPROM write protection\n"
+	);