X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=board%2Fesd%2Fpmc405%2Fpmc405.c;h=a72547d5ceff4dcbe561a56563a1183190979a91;hb=fddae7b8117c06cbc52027f297f5a657a87c8279;hp=5410a56c53cfdfa737012036d792c8f48a130587;hpb=ef9e86854e5c60d7db523d25c822985a4319d8b6;p=u-boot

diff --git a/board/esd/pmc405/pmc405.c b/board/esd/pmc405/pmc405.c
index 5410a56c53..a72547d5ce 100644
--- a/board/esd/pmc405/pmc405.c
+++ b/board/esd/pmc405/pmc405.c
@@ -27,6 +27,9 @@
 #include <malloc.h>
 
 
+extern void lxt971_no_sleep(void);
+
+
 /* fpga configuration data - not compressed, generated by bin2c */
 const unsigned char fpgadata[] =
 {
@@ -35,7 +38,7 @@ const unsigned char fpgadata[] =
 int filesize = sizeof(fpgadata);
 
 
-int board_pre_init (void)
+int board_early_init_f (void)
 {
 	/*
 	 * IRQ 0-15  405GP internally generated; active high; level sensitive
@@ -62,6 +65,18 @@ int board_pre_init (void)
 	 */
 	mtebc (epcr, 0xa8400000);
 
+	/*
+	 * Setup GPIO pins (CS6+CS7 as GPIO)
+	 */
+	mtdcr(cntrl0, mfdcr(cntrl0) | 0x00300000);
+
+	/*
+	 * Configure GPIO pins
+	 */
+	out32(GPIO0_ODR, 0x00000000);                                /* no open drain pins */
+	out32(GPIO0_TCR, CFG_FPGA_PRG | CFG_FPGA_CLK | CFG_FPGA_DATA); /* setup for output */
+	out32(GPIO0_OR, 0);                                            /* outputs -> low   */
+
 	return 0;
 }
 
@@ -76,6 +91,12 @@ int misc_init_f (void)
 
 int misc_init_r (void)
 {
+	DECLARE_GLOBAL_DATA_PTR;
+
+	/* adjust flash start and offset */
+	gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
+	gd->bd->bi_flashoffset = 0;
+
 	return (0);
 }
 
@@ -99,6 +120,11 @@ int checkboard (void)
 
 	putc ('\n');
 
+	/*
+	 * Disable sleep mode in LXT971
+	 */
+	lxt971_no_sleep();
+
 	return 0;
 }
 
@@ -130,3 +156,42 @@ int testdram (void)
 }
 
 /* ------------------------------------------------------------------------- */
+
+int do_cantest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+	ulong addr;
+	volatile uchar *ptr;
+	volatile uchar val;
+	int i;
+
+	addr = simple_strtol (argv[1], NULL, 16) + 0x16;
+
+	i = 0;
+	for (;;) {
+		ptr = (uchar *)addr;
+		for (i=0; i<8; i++) {
+			*ptr = i;
+			val = *ptr;
+
+			if (val != i) {
+				printf("ERROR: addr=%p write=0x%02X, read=0x%02X\n", ptr, i, val);
+				return 0;
+			}
+
+			/* Abort if ctrl-c was pressed */
+			if (ctrlc()) {
+				puts("\nAbort\n");
+				return 0;
+			}
+
+			ptr++;
+		}
+	}
+
+	return 0;
+}
+U_BOOT_CMD(
+	cantest,	3,	1,	do_cantest,
+	"cantest - Test CAN controller",
+	NULL
+	);